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    SEMICONDUCTOR DEVICE AND ELECTRONIC APPLIANCE USING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC APPLIANCE USING THE SAME 有权
    半导体器件和使用该器件的电子器件

    公开(公告)号：US20110163793A1

    公开(公告)日：2011-07-07

    申请号：US13047046

    申请日：2011-03-14

    申请人： Mitsuaki OSAME ,  Tomoyuki IWABUCHI ,  Hajime KIMURA

    发明人： Mitsuaki OSAME ,  Tomoyuki IWABUCHI ,  Hajime KIMURA

    IPC分类号： H03K17/687

    CPC分类号： G09G3/30 ,  G09G2310/0275 ,  G09G2320/041 ,  G09G2320/043 ,  G09G2360/148 ,  H01L27/12 ,  H03K19/0013 ,  H03K19/0016

    摘要： A semiconductor device with less power consumption and an electronic appliance using the same. The semiconductor device of the invention is supplied with a first potential from a high potential power source and a second potential from a low potential power source. Upon input of a first signal to an input node, an output node outputs a second signal. With the semiconductor device of the invention, a potential difference of the second signal can be controlled to be smaller than a potential difference between the first potential and the second potential, thereby power consumption required for charging/discharging wires can be reduced.

    摘要翻译： 具有较少功率消耗的半导体器件和使用该半导体器件的电子设备。 本发明的半导体器件被提供有来自高电位电源的第一电位和来自低电位电源的第二电位。 在输入节点输入第一信号时，输出节点输出第二信号。 利用本发明的半导体器件，可以将第二信号的电位差控制为小于第一电位和第二电位之间的电位差，从而可以减少对放电/放电所需的功耗。

    DISPLAY DEVICE AND ELECTRONIC APPARATUS
    3.
    发明申请
    DISPLAY DEVICE AND ELECTRONIC APPARATUS 有权
    显示设备和电子设备

    公开(公告)号：US20060262054A1

    公开(公告)日：2006-11-23

    申请号：US11419345

    申请日：2006-05-19

    申请人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Yoshifumi TANADA ,  Mitsuaki OSAME ,  Hajime KIMURA ,  Ryota FUKUMOTO ,  Hiromi YANAI ,  Hideaki SHISHIDO

    发明人： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Yoshifumi TANADA ,  Mitsuaki OSAME ,  Hajime KIMURA ,  Ryota FUKUMOTO ,  Hiromi YANAI ,  Hideaki SHISHIDO

    IPC分类号： G09G3/30

    CPC分类号： G09G3/20 ,  G09G3/2022 ,  G09G3/3225 ,  G09G2300/0861 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2330/021 ,  G09G2340/0428 ,  G09G2360/141 ,  G09G2360/144

    摘要： Outside light is received using a light sensor, and in accordance with the outside light intensity, each of a first display mode which expresses multiple gray scales and a second display-y mode which expresses a gray scale smaller in number than that in the first display mode is switched and used. The switching is controlled by a display controller based on data of the outside light intensity. Accordingly, the visibility can be ensured in a wide range of situations, from under a fluorescent lamp in a dark place or inside, to under sunlight outside. In the second display mode, frequencies of a start pulse and a clock pulse to be inputted to a source signal line driver circuit are reduced and a driving voltage is decreased by the display controller; accordingly, a frame period can be longer than that in the first display mode and power consumption can be reduced.

    摘要翻译： 使用光传感器接收外部光，并且根据外部光强度，表示多个灰度级的第一显示模式和表示比第一显示器中的数字更小的灰度级的第二显示器y模式 模式被切换和使用。 基于外部光强度的数据，由显示控制器控制切换。 因此，可以在广泛的情况下，从在黑暗的地方或内部的荧光灯到室外的阳光下确保可视性。 在第二显示模式中，通过显示控制器减少要输入到源极信号线驱动电路的起始脉冲和时钟脉冲的频率，并降低驱动电压。 因此，帧周期可以比第一显示模式中的帧周期长，并且可以降低功耗。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110309368A1

    公开(公告)日：2011-12-22

    申请号：US13223582

    申请日：2011-09-01

    申请人： Shunpei YAMAZAKI ,  Masahiko HAYAKAWA ,  Yoshifumi TANADA ,  Mitsuaki OSAME ,  Aya ANZAI ,  Ryota FUKUMOTO

    发明人： Shunpei YAMAZAKI ,  Masahiko HAYAKAWA ,  Yoshifumi TANADA ,  Mitsuaki OSAME ,  Aya ANZAI ,  Ryota FUKUMOTO

    IPC分类号： H01L33/08

    CPC分类号： H01L27/3262 ,  G09G3/3233 ,  G09G2310/0251 ,  G09G2330/04 ,  H01L27/0248 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/78675

    摘要： Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

    摘要翻译： 半导体元件由于静电放电损坏而劣化或被破坏。 本发明提供一种其中在每个像素中形成保护装置的半导体器件。 保护装置设置有从由电阻元件，电容器元件和整流元件组成的组中选择的一个或多个元件。 通过在发光元件的像素电极和源电极之间设置保护装置，可以减轻由于在像素电极中积聚的电荷导致的晶体管的源电极或漏电极的电位的突然变化，或 晶体管的漏极。 因此防止了由于静电放电损坏导致的半导体元件的劣化或破坏。

    DATA LATCH CIRCUIT, DRIVING METHOD OF THE DATA LATCH CIRCUIT, AND DISPLAY DEVICE
    6.
    发明申请
    DATA LATCH CIRCUIT, DRIVING METHOD OF THE DATA LATCH CIRCUIT, AND DISPLAY DEVICE 有权
    数据锁存电路，数据锁存电路的驱动方法和显示装置

    公开(公告)号：US20060244690A1

    公开(公告)日：2006-11-02

    申请号：US11279630

    申请日：2006-04-13

    申请人： Mitsuaki OSAME ,  Tatsuro UENO

    发明人： Mitsuaki OSAME ,  Tatsuro UENO

    IPC分类号： G09G3/30

    CPC分类号： G09G3/20 ,  G09G3/2022 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/027 ,  G09G2310/0294 ,  G09G2330/021 ,  H03K3/356147

    摘要： The present invention provides a data latch circuit which can operate stably with a low-amplitude signal, which consumes less electric power, and which is resistant against the variation in TFTs. When an analog switch is turned on, a data signal is inputted to a gate electrode of an n-channel TFT and, at this time, VDD is supplied to an input terminal of an inverter. When the analog switch in turned off, the n-channel TFT is turned on or off depending on a level of the data signa. When the data signal is at an H level, the n-channel TFT is turned on and VSS is supplied to the input terminal of the inverter. When the data signal is at an L level, VDD is supplied to an input terminal of the inverter. Therefore, only VDD and VSS levels are applied to the input terminal of the inverter.

    摘要翻译： 本发明提供一种数据锁存电路，其能够以低幅度信号稳定地操作，其消耗较少的电力，并且能够抵抗TFT的变化。 当模拟开关导通时，数据信号被输入到n沟道TFT的栅电极，此时，VDD被提供给逆变器的输入端。 当模拟开关关闭时，n沟道TFT根据数据信号的电平开启或关闭。 当数据信号为H电平时，n沟道TFT导通，VSS被提供给反相器的输入端。 当数据信号为L电平时，VDD被提供给变频器的输入端子。 因此，只有VDD和VSS电平施加到变频器的输入端。

    SOURCE LINE DRIVING CIRCUIT, ACTIVE MATRIX TYPE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME
    7.
    发明申请
    SOURCE LINE DRIVING CIRCUIT, ACTIVE MATRIX TYPE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME 有权
    源线驱动电路，有源矩阵型显示装置及其驱动方法

    公开(公告)号：US20120133839A1

    公开(公告)日：2012-05-31

    申请号：US13368374

    申请日：2012-02-08

    申请人： Mitsuaki OSAME ,  Aya MIYAZAKI

    发明人： Mitsuaki OSAME ,  Aya MIYAZAKI

    IPC分类号： H04N5/268

    CPC分类号： G09G3/3688 ,  G09G3/3275 ,  G09G2310/0235

    摘要： If the frequency of a clock signal is increased, the pulse width of a sampling pulse is decreased, and the amount of time for a video signal to be written to a source line is inadequate. Sampling pulses (sam) rise sequentially in synchronization with the rise of a start pulse (SP). As the start pulse (SP) rises, synchronized with the rise of clock signals (CK, CKB), the sampling pulses (sam) fall off sequentially, delayed by half the period of the clock signals (CK, CKB) for every step. As a result, the sampling pulses (sam) with a pulse width longer than one period of the clock signals (CK, CKB) are generated. In a period Ta, a desired video signal (VIDEO) is written to its corresponding source line. In this way, the time for half a period of the clock signal can be secured for writing to the source line.

    摘要翻译： 如果时钟信号的频率增加，则采样脉冲的脉冲宽度减小，并且视频信号写入源极线的时间量不足。 采样脉冲（sam）与起始脉冲（SP）的上升同步上升。 随着起始脉冲（SP）上升，与时钟信号（CK，CKB）的上升同步，采样脉冲（sam）依次下降，延迟了每一步的时钟信号（CK，CKB）周期的一半。 结果，产生脉冲宽度大于时钟信号（CK，CKB）的一个周期的采样脉冲（sam）。 在周期Ta中，将期望的视频信号（VIDEO）写入其对应的源极线。 以这种方式，可以确保时钟信号的半个周期的时间用于写入源极线。

    DISPLAY DEVICE
    9.
    发明申请
    DISPLAY DEVICE 有权
    显示设备

    公开(公告)号：US20090315032A1

    公开(公告)日：2009-12-24

    申请号：US12492165

    申请日：2009-06-26

    申请人： Shunpei YAMAZAKI ,  Satoshi MURAKAMI ,  Mitsuaki OSAME

    发明人： Shunpei YAMAZAKI ,  Satoshi MURAKAMI ,  Mitsuaki OSAME

    IPC分类号： H01L33/00

    CPC分类号： H01L27/1248 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3244 ,  H01L27/3246 ,  H01L27/3258 ,  H01L27/326 ,  H01L27/3262 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/78645 ,  H01L51/5237 ,  H01L51/524 ,  H01L51/5253 ,  H01L51/5271 ,  H01L2251/5315

    摘要： A display device according to the present invention includes: a planarization layer for insulating between a gate electrode etc. and a data wiring, a drain electrode, or the like of the transistor; and a barrier layer that is formed on an upper surface or lower surface of the planarization layer and at the same time, adapted to suppress diffusion of moisture or degassing components from the planarization layer. The display device adopts a device structure effective in reducing the plasma damage on the planarization layer by devising a positional relationship between the planarization layer and the barrier layer. Also, in combination with a novel structure as a structure for a pixel electrode, effects such as an increase in luminance can be provided as well.

    摘要翻译： 根据本发明的显示装置包括：用于在晶体管的栅电极等与数据布线，漏极等之间绝缘的平坦化层; 以及形成在平坦化层的上表面或下表面上并且同时适于抑制水分或脱气组分从平坦化层扩散的阻挡层。 显示装置采用通过设计平坦化层与阻挡层之间的位置关系有效地减小平坦化层上的等离子体损伤的装置结构。 而且，与作为像素电极的结构的新颖结构相结合，也可以提供诸如亮度增加的效果。