公开(公告)号：US07452756B2

公开(公告)日：2008-11-18

申请号：US11979527

申请日：2007-11-05

申请人： Mitsuru Kaneda ,  Hideki Takahashi

发明人： Mitsuru Kaneda ,  Hideki Takahashi

IPC分类号： H01L21/20 ,  H01L21/338 ,  H01L23/62

CPC分类号： H01L29/0834 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device according to one of the aspects of the present invention includes a semiconductor substrate of a first conductivity type, having upper and lower surfaces. A collector region of a second conductivity type is formed on the lower surface of the semiconductor substrate, and a collector electrode is formed on the collector region. Also, at least one pair of isolation regions of the second conductivity type are formed extending from the upper surface of the semiconductor substrate to the collector layer for defining a drift region of the first conductivity type, in conjunction with the collector region. A base region of the second conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the drift region, and an emitter region of the first conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the base region. A gate electrode is formed opposing to the base region via an insulating layer. An emitter electrode is formed on the emitter region. The collector layer has thickness in the range between 17 μm to 50 μm.

公开(公告)号：US06838321B2

公开(公告)日：2005-01-04

申请号：US10670331

申请日：2003-09-26

申请人： Mitsuru Kaneda ,  Hideki Takahashi

发明人： Mitsuru Kaneda ,  Hideki Takahashi

IPC分类号： H01L21/331 ,  H01L29/08 ,  H01L29/32 ,  H01L29/739 ,  H01L21/332 ,  H01L29/74

CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/32 ,  H01L29/7395

摘要： An N−-type silicon substrate (1) has a bottom surface and an upper surface which are opposed to each other. In the bottom surface of the N−-type silicon substrate (1), a P-type impurity diffusion layer (3) of high concentration is entirely formed by diffusing a P-type impurity. In the upper surface of the N−-type silicon substrate (1), a P-type isolation region (2) is partially formed by diffusing a P-type impurity. The P-type isolation region (2) has a bottom surface reaching an upper surface of the P-type impurity diffusion layer (3). As viewed from the upper surface side of the N−-type silicon substrate (1), the P-type isolation region (2) is formed, surrounding an N− region (1a) which is part of the N−-type silicon substrate (1). The N− region (1a) surrounded by the P-type isolation region (2) is defined as an element formation region of the N−-type silicon substrate (1). Thus obtained are a semiconductor device and a method of manufacturing the same, and a semiconductor substrate and a method of manufacturing the same, which make it possible to retain bidirectional breakdown voltages and ensure high reliability.

摘要翻译： N型硅基板（1）具有彼此相对的底表面和上表面。 在N - 型硅衬底（1）的底表面中，通过扩散P型杂质，完全形成了高浓度的P型杂质扩散层（3）。 在N型硅衬底（1）的上表面中，通过扩散P型杂质部分地形成P型隔离区（2）。 P型隔离区域（2）具有到达P型杂质扩散层（3）的上表面的底面。 从N型硅衬底（1）的上表面侧观察，形成P型隔离区域（2），该N型区域包围作为N < - 硅型硅衬底（1）。 由P型隔离区域（2）围绕的N +区域（1a）被定义为N - 型硅衬底（1）的元件形成区域。 这样获得的是半导体器件及其制造方法，半导体衬底及其制造方法，可以保持双向击穿电压并确保高可靠性。

公开(公告)号：US20080064148A1

公开(公告)日：2008-03-13

申请号：US11979527

申请日：2007-11-05

申请人： Mitsuru Kaneda ,  Hideki Takahashi

发明人： Mitsuru Kaneda ,  Hideki Takahashi

IPC分类号： H01L21/331

CPC分类号： H01L29/0834 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device according to one of the aspects of the present invention includes a semiconductor substrate of a first conductivity type, having upper and lower surfaces. A collector region of a second conductivity type is formed on the lower surface of the semiconductor substrate, and a collector electrode is formed on the collector region. Also, at least one pair of isolation regions of the second conductivity type are formed extending from the upper surface of the semiconductor substrate to the collector layer for defining a drift region of the first conductivity type, in conjunction with the collector region. A base region of the second conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the drift region, and an emitter region of the first conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the base region. A gate electrode is formed opposing to the base region via an insulating layer. An emitter electrode is formed on the emitter region. The collector layer has thickness in the range between 17 μm to 50 μm.

公开(公告)号：US07705398B2

公开(公告)日：2010-04-27

申请号：US11617863

申请日：2006-12-29

申请人： Mitsuru Kaneda ,  Hideki Takahashi ,  Yoshifumi Tomomatsu

发明人： Mitsuru Kaneda ,  Hideki Takahashi ,  Yoshifumi Tomomatsu

IPC分类号： H01L29/76

CPC分类号： H01L29/861 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/404 ,  H01L29/66348 ,  H01L29/7397 ,  H01L2924/0002 ,  H01L2924/00

摘要： A second impurity region is surrounded by a first impurity region at a first main surface. A third impurity region of the first main surface sandwiches the second impurity region with the first impurity region. Fourth and fifth impurity regions of a second main surface sandwich the first impurity region with the second impurity region. A control electrode layer is opposite to the second impurity region with an insulating film interposed. That portion of the second main surface which is opposite to the portion of the first main surface where the first impurity region is formed surrounds the regions for forming the fourth and fifth impurity regions of the second main surface, and it is a region of the first conductivity type or a region of the second conductivity type having impurity concentration not higher than that of the first impurity region.

摘要翻译： 第二杂质区被第一主表面处的第一杂质区围绕。 第一主表面的第三杂质区域与第一杂质区域夹杂第二杂质区域。 第二主表面的第四和第五杂质区域夹着第一杂质区域与第二杂质区域。 控制电极层与介于绝缘膜之间的第二杂质区相对。 第二主表面的与形成有第一杂质区域的第一主表面的部分相对的部分包围用于形成第二主表面的第四和第五杂质区域的区域，并且其是第一 导电类型或具有不高于第一杂质区的杂质浓度的第二导电类型的区域。

公开(公告)号：US07326996B2

公开(公告)日：2008-02-05

申请号：US11163248

申请日：2005-10-11

申请人： Mitsuru Kaneda ,  Hideki Takahashi

发明人： Mitsuru Kaneda ,  Hideki Takahashi

IPC分类号： H01L29/94 ,  H01L21/332

CPC分类号： H01L29/0834 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device according to one of the aspects of the present invention includes a semiconductor substrate of a first conductivity type, having upper and lower surfaces. A collector region of a second conductivity type is formed on the lower surface of the semiconductor substrate, and a collector electrode is formed on the collector region. Also, at least one pair of isolation regions of the second conductivity type are formed extending from the upper surface of the semiconductor substrate to the collector layer for defining a drift region of the first conductivity type, in conjunction with the collector region. A base region of the second conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the drift region, and an emitter region of the first conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the base region. A gate electrode is formed opposing to the base region via an insulating layer. An emitter electrode is formed on the emitter region. The collector layer has thickness in the range between 17 μm to 50 μm.

摘要翻译： 根据本发明的一个方面的半导体器件包括具有上表面和下表面的第一导电类型的半导体衬底。 在半导体衬底的下表面上形成第二导电类型的集电极区域，并且在集电极区域上形成集电极。 此外，形成第二导电类型的至少一对隔离区域，从半导体衬底的上表面延伸到集电极层，用于与集电极区域一起限定第一导电类型的漂移区域。 第二导电类型的基极区域形成在与半导体衬底的上表面相邻并且在漂移区域内，并且第一导电类型的发射极区域邻近半导体衬底的上表面并在基极区域内形成。 经由绝缘层与栅极电极相对地形成栅电极。 发射极电极形成在发射极区域上。 集电体层的厚度在17μm到50μm之间的范围内。

公开(公告)号：US20080093697A1

公开(公告)日：2008-04-24

申请号：US11617863

申请日：2006-12-29

申请人： Mitsuru Kaneda ,  Hideki Takahashi ,  Yoshifumi Tomomatsu

发明人： Mitsuru Kaneda ,  Hideki Takahashi ,  Yoshifumi Tomomatsu

IPC分类号： H01L23/58

CPC分类号： H01L29/861 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/404 ,  H01L29/66348 ,  H01L29/7397 ,  H01L2924/0002 ,  H01L2924/00

摘要： A second impurity region is surrounded by a first impurity region at a first main surface. A third impurity region of the first main surface sandwiches the second impurity region with the first impurity region. Fourth and fifth impurity regions of a second main surface sandwich the first impurity region with the second impurity region. A control electrode layer is opposite to the second impurity region with an insulating film interposed. That portion of the second main surface which is opposite to the portion of the first main surface where the first impurity region is formed surrounds the regions for forming the fourth and fifth impurity regions of the second main surface, and it is a region of the first conductivity type or a region of the second conductivity type having impurity concentration not higher than that of the first impurity region.

摘要翻译： 第二杂质区被第一主表面处的第一杂质区围绕。 第一主表面的第三杂质区域与第一杂质区域夹杂第二杂质区域。 第二主表面的第四和第五杂质区域夹着第一杂质区域与第二杂质区域。 控制电极层与介于绝缘膜之间的第二杂质区相对。 第二主表面的与形成有第一杂质区域的第一主表面的部分相对的部分包围用于形成第二主表面的第四和第五杂质区域的区域，并且其是第一 导电类型或具有不高于第一杂质区的杂质浓度的第二导电类型的区域。

公开(公告)号：US20060163664A1

公开(公告)日：2006-07-27

申请号：US11163248

申请日：2005-10-11

申请人： Mitsuru Kaneda ,  Hideki Takahashi

发明人： Mitsuru Kaneda ,  Hideki Takahashi

IPC分类号： H01L29/76

CPC分类号： H01L29/0834 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device according to one of the aspects of the present invention includes a semiconductor substrate of a first conductivity type, having upper and lower surfaces. A collector region of a second conductivity type is formed on the lower surface of the semiconductor substrate, and a collector electrode is formed on the collector region. Also, at least one pair of isolation regions of the second conductivity type are formed extending from the upper surface of the semiconductor substrate to the collector layer for defining a drift region of the first conductivity type, in conjunction with the collector region. A base region of the second conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the drift region, and an emitter region of the first conductivity type is formed adjacent the upper surface of the semiconductor substrate and within the base region. A gate electrode is formed opposing to the base region via an insulating layer. An emitter electrode is formed on the emitter region. The collector layer has thickness in the range between 17 μm to 50 μm.

摘要翻译： 根据本发明的一个方面的半导体器件包括具有上表面和下表面的第一导电类型的半导体衬底。 在半导体衬底的下表面上形成第二导电类型的集电极区域，并且在集电极区域上形成集电极。 此外，形成第二导电类型的至少一对隔离区域，从半导体衬底的上表面延伸到集电极层，用于与集电极区域一起限定第一导电类型的漂移区域。 第二导电类型的基极区域形成在与半导体衬底的上表面相邻并且在漂移区域内，并且第一导电类型的发射极区域邻近半导体衬底的上表面并在基极区域内形成。 经由绝缘层与栅极电极相对地形成栅电极。 发射极电极形成在发射极区域上。 集电体层的厚度在17μm到50μm之间的范围内。

公开(公告)号：US08486716B2

公开(公告)日：2013-07-16

申请号：US13491296

申请日：2012-06-07

申请人： Hiroyuki Kabata ,  Hideki Takahashi ,  Ikuro Maruyama ,  Rena Tsuruoka

发明人： Hiroyuki Kabata ,  Hideki Takahashi ,  Ikuro Maruyama ,  Rena Tsuruoka

IPC分类号： G01N33/52 ,  G01N33/53 ,  C07K14/77

CPC分类号： G01N33/74 ,  G01N21/82 ,  G01N33/536 ,  G01N33/6827 ,  G01N33/6872 ,  G01N33/86

摘要： The present invention provides a method for detection of a basic peptide by mixing a sample suspected to contain the basic peptide and a reagent containing denatured albumin and detecting turbidness due to a complex of the basic peptide and denatured albumin.

摘要翻译： 本发明提供一种通过混合疑似含有碱性肽的样品和含有变性白蛋白的试剂并检测由于碱性肽和变性白蛋白的复合物而引起的混浊的检测碱性肽的方法。

公开(公告)号：US08428108B2

公开(公告)日：2013-04-23

申请号：US12713715

申请日：2010-02-26

申请人： Katsuyuki Tanaka ,  Manabu Nitta ,  Hideki Takahashi

发明人： Katsuyuki Tanaka ,  Manabu Nitta ,  Hideki Takahashi

IPC分类号： H04B1/00

CPC分类号： H04B1/7075 ,  G01S19/23

摘要： In a signal processing apparatus a synchronizer acquires synchronization with the spreading code of an intermediate frequency signal converted from a signal received from a satellite in a global positioning system. A demodulator then demodulates a message contained in the intermediate frequency signal. A measuring unit outputs a primary signal to a predetermined signal line, the primary signal expressing positioning results for the apparatus as measured on the basis of the demodulated message. A secondary signal output unit attaches a predetermined header to a secondary signal and outputs the result to the predetermined signal line, the secondary signal containing at least the intermediate frequency signal, or a signal generated from the intermediate frequency signal.

摘要翻译： 在信号处理装置中，同步器获取与在全球定位系统中从卫星接收的信号转换的中频信号的扩展码的同步。 解调器然后解调包含在中频信号中的消息。 测量单元将主信号输出到预定信号线，该主信号表示基于解调消息测量的装置的定位结果。 次级信号输出单元将预定标题附加到辅助信号，并将结果输出到预定信号线，至少包含中频信号的二次信号或从中频信号产生的信号。

公开(公告)号：US08351470B2

公开(公告)日：2013-01-08

申请号：US12795312

申请日：2010-06-07

申请人： Hideki Awata ,  Hideki Takahashi

发明人： Hideki Awata ,  Hideki Takahashi

IPC分类号： H04J1/02 ,  H04B1/00 ,  G01S19/00

CPC分类号： G01S19/29 ,  G01S19/37

摘要： A signal receiver including an input that receives a plurality of signals from a respective plurality of channels; a multiplexer unit that receives the plurality of signals from the input and that selects, in a time-division manner, one of the plurality of signals; and at least one phase difference detector that receives the selected signal from the multiplexer unit, a number of the at least one phase difference detectors being less than a number of the plurality of channels.

摘要翻译： 一种信号接收机，包括从相应的多个信道接收多个信号的输入; 多路复用器单元，其从所述输入接收所述多个信号，并且以时分方式选择所述多个信号中的一个; 以及至少一个相位差检测器，其从所述多路复用器单元接收所选择的信号，所述至少一个相位差检测器的数量小于所述多个通道的数量。