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公开(公告)号：US20100193964A1
公开(公告)日：2010-08-05
申请号：US12697562
申请日：2010-02-01
IPC分类号： H01L23/538 , H01L21/768
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L2224/80895 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2224/9202 , H01L2224/9212 , H01L2225/06541 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： A method and structure of connecting at least two integrated circuits in a 3D arrangement by a through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.
摘要翻译： 一种通过硅通过3D布置连接至少两个集成电路的方法和结构，其通过其同时连接第一集成电路中的连接焊盘和第二集成电路中的连接焊盘。
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公开(公告)号：US20120126425A1
公开(公告)日：2012-05-24
申请号：US13364002
申请日：2012-02-01
IPC分类号： H01L23/538
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L2224/80895 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2224/9202 , H01L2224/9212 , H01L2225/06541 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： A structure of connecting at least two integrated circuits in a 3D arrangement by a metal-filled through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.
摘要翻译： 通过金属填充的硅连接3D布置中的至少两个集成电路的结构，其通过其连接第一集成电路中的连接焊盘和第二集成电路中的连接焊盘。
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公开(公告)号：US08158515B2
公开(公告)日：2012-04-17
申请号：US12697562
申请日：2010-02-01
IPC分类号： H01L21/44
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L2224/80895 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2224/9202 , H01L2224/9212 , H01L2225/06541 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： A method and structure of connecting at least two integrated circuits in a 3D arrangement by a through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.
摘要翻译： 一种通过硅通过3D布置连接至少两个集成电路的方法和结构，其通过其同时连接第一集成电路中的连接焊盘和第二集成电路中的连接焊盘。
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公开(公告)号：US08674515B2
公开(公告)日：2014-03-18
申请号：US13364002
申请日：2012-02-01
IPC分类号： H01L23/538
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/481 , H01L25/50 , H01L2224/80895 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2224/9202 , H01L2224/9212 , H01L2225/06541 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： A structure of connecting at least two integrated circuits in a 3D arrangement by a metal-filled through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.
摘要翻译： 通过金属填充的硅连接3D布置中的至少两个集成电路的结构，其通过其连接第一集成电路中的连接焊盘和第二集成电路中的连接焊盘。
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5.发明授权3D integrated circuit device fabrication using interface wafer as permanent carrier 有权使用接口晶片作为永久载体的3D集成电路器件制造公开(公告)号：US08298914B2
公开(公告)日：2012-10-30
申请号：US12194198
申请日：2008-08-19
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
IPC分类号： H01L21/4763
CPC分类号： H01L25/0657 , H01L21/6835 , H01L25/18 , H01L25/50 , H01L2221/68377 , H01L2224/0401 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05558 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/131 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73153 , H01L2224/73253 , H01L2224/83121 , H01L2224/83895 , H01L2224/92242 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/157 , H01L2924/37001 , H01L2224/83 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： A method is provided for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer. Also provided is a tangible computer readable medium encoded with a program that comprises instructions for performing such a method.
摘要翻译： 提供了一种用于制造3D集成电路结构的方法。 提供了包括第一布线层和穿硅通孔的接口晶片，以及包括有源电路的第一有源电路层晶片。 第一有源电路层晶片被结合到界面晶片。 然后，去除第一有源电路层晶片的第一部分，使得第二部分保持附着到界面晶片。 包括接口晶片和第一有源电路层晶片的第二部分的堆叠结构被结合到基底晶片。 接下来，将界面晶片减薄以形成界面层，并且在界面层上形成通过界面层中的穿硅通孔耦合到第一布线层的金属化。 还提供了一种用包括用于执行这种方法的指令的程序编码的有形计算机可读介质。
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6.发明授权3D integrated circuit device fabrication with precisely controllable substrate removal 有权3D集成电路器件制造具有精确可控的衬底去除公开(公告)号：US08129256B2
公开(公告)日：2012-03-06
申请号：US12194065
申请日：2008-08-19
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
IPC分类号： H01L21/30
CPC分类号： H01L27/105 , H01L24/11 , H01L27/0688 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05147 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599
摘要： A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first active circuitry layer wafer comprises a P+ portion covered by a P− layer, and the P− layer includes active circuitry. The first active circuitry layer wafer is bonded face down to an interface wafer that includes a first wiring layer, and then the P+ portion of the first active circuitry layer wafer is selectively removed with respect to the P− layer of the first active circuitry layer wafer. Next, a wiring layer is fabricated on the backside of the P− layer. Also provided are a tangible computer readable medium encoded with a program for fabricating a 3D integrated circuit structure, and a 3D integrated circuit structure.
摘要翻译： 提供了一种用于制造3D集成电路结构的方法。 根据该方法，提供第一有源电路层晶片。 第一有源电路层晶片包括由P层覆盖的P +部分，并且P层包括有源电路。 第一有源电路层晶片面向下接合到包括第一布线层的接口晶片，然后相对于第一有源电路层晶片的P层选择性地去除第一有源电路层晶片的P +部分 。 接下来，在P-层的背面上制造布线层。 还提供了用用于制造3D集成电路结构的程序编码的有形计算机可读介质和3D集成电路结构。
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7.发明授权Method for fabricating 3D integrated circuit device using interface wafer as permanent carrier 有权使用接口晶片作为永久载体制造3D集成电路器件的方法公开(公告)号：US08664081B2
公开(公告)日：2014-03-04
申请号：US13572037
申请日：2012-08-10
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
IPC分类号： H01L21/30
CPC分类号： H01L25/0657 , H01L21/6835 , H01L25/18 , H01L25/50 , H01L2221/68377 , H01L2224/0401 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05558 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/131 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73153 , H01L2224/73253 , H01L2224/83121 , H01L2224/83895 , H01L2224/92242 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/157 , H01L2924/37001 , H01L2224/83 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.
摘要翻译： 提供了一种计算机可读介质，其由包括用于执行制造3D集成电路结构的方法的指令的程序编码。 提供了包括第一布线层和穿硅通孔的接口晶片，以及包括有源电路的第一有源电路层晶片。 第一有源电路层晶片被结合到界面晶片。 然后，去除第一有源电路层晶片的第一部分，使得第二部分保持附着到界面晶片。 包括接口晶片和第一有源电路层晶片的第二部分的堆叠结构被结合到基底晶片。 接下来，将界面晶片减薄以形成界面层，并且在界面层上形成通过界面层中的穿硅通孔耦合到第一布线层的金属化。
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8.发明授权Computer readable medium encoded with a program for fabricating 3D integrated circuit device using interface wafer as permanent carrier 有权用用于制造使用界面晶片作为永久载体的3D集成电路器件的程序编码的计算机可读介质公开(公告)号：US08962448B2
公开(公告)日：2015-02-24
申请号：US13572004
申请日：2012-08-10
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
IPC分类号： H01L21/46
CPC分类号： H01L25/0657 , H01L21/6835 , H01L25/18 , H01L25/50 , H01L2221/68377 , H01L2224/0401 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05558 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/131 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73153 , H01L2224/73253 , H01L2224/83121 , H01L2224/83895 , H01L2224/92242 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/157 , H01L2924/37001 , H01L2224/83 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.
摘要翻译： 提供了一种计算机可读介质，其由包括用于执行制造3D集成电路结构的方法的指令的程序编码。 提供了包括第一布线层和穿硅通孔的接口晶片，以及包括有源电路的第一有源电路层晶片。 第一有源电路层晶片被结合到界面晶片。 然后，去除第一有源电路层晶片的第一部分，使得第二部分保持附着到界面晶片。 包括接口晶片和第一有源电路层晶片的第二部分的堆叠结构被结合到基底晶片。 接下来，将界面晶片减薄以形成界面层，并且在界面层上形成通过界面层中的穿硅通孔耦合到第一布线层的金属化。
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9.发明申请3D INTEGRATED CIRCUIT DEVICE FABRICATION WITH PRECISELY CONTROLLABLE SUBSTRATE REMOVAL 有权具有精密可控底板拆卸的3D集成电路设备制造公开(公告)号：US20120153429A1
公开(公告)日：2012-06-21
申请号：US13398505
申请日：2012-02-16
申请人： Mukta G. FAROOQ , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
发明人： Mukta G. FAROOQ , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
CPC分类号： H01L27/105 , H01L24/11 , H01L27/0688 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05147 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2924/00014 , H01L2924/14 , H01L2924/00 , H01L2224/05599
摘要： A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first active circuitry layer wafer comprises a P+ portion covered by a P− layer, and the P− layer includes active circuitry. The first active circuitry layer wafer is bonded face down to an interface wafer that includes a first wiring layer, and then the P+ portion of the first active circuitry layer wafer is selectively removed with respect to the P− layer of the first active circuitry layer wafer. Next, a wiring layer is fabricated on the backside of the P− layer. Also provided are a tangible computer readable medium encoded with a program for fabricating a 3D integrated circuit structure, and a 3D integrated circuit structure.
摘要翻译： 提供了一种用于制造3D集成电路结构的方法。 根据该方法，提供第一有源电路层晶片。 第一有源电路层晶片包括由P层覆盖的P +部分，并且P层包括有源电路。 第一有源电路层晶片面向下接合到包括第一布线层的接口晶片，然后相对于第一有源电路层晶片的P层选择性地去除第一有源电路层晶片的P +部分 。 接下来，在P-层的背面上制造布线层。 还提供了用用于制造3D集成电路结构的程序编码的有形计算机可读介质和3D集成电路结构。
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10.发明申请COMPUTER READABLE MEDIUM ENCODED WITH A PROGRAM FOR FABRICATING 3D INTEGRATED CIRCUIT DEVICE USING INTERFACE WAFER AS PERMANENT CARRIER 有权使用接口作为永久载体制作3D集成电路设备的程序编写的计算机可读介质公开(公告)号：US20150024548A1
公开(公告)日：2015-01-22
申请号：US13572004
申请日：2012-08-10
申请人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
发明人： Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Fei Liu , Sampath Purushothaman , Albert M. Young , Roy R. Yu
IPC分类号： H01L25/065 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/6835 , H01L25/18 , H01L25/50 , H01L2221/68377 , H01L2224/0401 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05558 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/131 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73153 , H01L2224/73253 , H01L2224/83121 , H01L2224/83895 , H01L2224/92242 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06593 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/157 , H01L2924/37001 , H01L2224/83 , H01L2224/11 , H01L2924/014 , H01L2924/00014
摘要： A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.
摘要翻译： 提供了一种计算机可读介质，其由包含用于执行制造3D集成电路结构的方法的指令的程序编码。 提供了包括第一布线层和穿硅通孔的接口晶片，以及包括有源电路的第一有源电路层晶片。 第一有源电路层晶片被结合到界面晶片。 然后，去除第一有源电路层晶片的第一部分，使得第二部分保持附着到界面晶片。 包括接口晶片和第一有源电路层晶片的第二部分的堆叠结构被结合到基底晶片。 接下来，将界面晶片减薄以形成界面层，并且在界面层上形成通过界面层中的穿硅通孔耦合到第一布线层的金属化。
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