Semiconductor device
    2.
    发明授权

    公开(公告)号:US10164170B2

    公开(公告)日:2018-12-25

    申请号:US15622064

    申请日:2017-06-13

    IPC分类号: H01L43/02 H01L43/08 H01L27/22

    摘要: A first lower interconnection structure and a second lower interconnection structure are formed using a first design rule on a first region of a substrate and a second region of the substrate, respectively. A memory element is formed on the first lower interconnection structure. The memory element includes a bottom electrode, a magnetic tunnel junction and a top electrode stacked on each other. An upper conductive line and an upper interconnection line are formed using a second design rule larger than the first design rule on the first lower interconnection structure and the second lower interconnection structure, respectively. The first lower interconnection structure, the memory element and the upper conductive line are stacked on each other so that the memory element is interposed between the first lower interconnection structure and the upper conductive line.

    Semiconductor device and method of forming the same

    公开(公告)号:US09911787B2

    公开(公告)日:2018-03-06

    申请号:US15187929

    申请日:2016-06-21

    摘要: A semiconductor device includes an active region defining an isolation region. First and second cell interconnection structures are on the active region and the isolation region, and have line shapes that are parallel to each other. An isolation pattern is on the active region and the isolation region. The isolation pattern is between the first and second cell interconnection structures. Contact structures are between the first and second cell interconnection structures. The contact structures are at both sides of the isolation pattern and overlap the active region. Insulating patterns are between the first and second cell interconnection structures. The insulating patterns are at both sides of the isolation pattern and overlap the isolation region. Common source regions are under the first and second cell interconnection structures. The common source regions are in the active region. An isolating gate pattern that has a line shape is under the isolation pattern.

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20170110507A1

    公开(公告)日:2017-04-20

    申请号:US15187929

    申请日:2016-06-21

    摘要: A semiconductor device includes an active region defining an isolation region. First and second cell interconnection structures are on the active region and the isolation region, and have line shapes that are parallel to each other. An isolation pattern is on the active region and the isolation region. The isolation pattern is between the first and second cell interconnection structures. Contact structures are between the first and second cell interconnection structures. The contact structures are at both sides of the isolation pattern and overlap the active region. Insulating patterns are between the first and second cell interconnection structures. The insulating patterns are at both sides of the isolation pattern and overlap the isolation region. Common source regions are under the first and second cell interconnection structures. The common source regions are in the active region. An isolating gate pattern that has a line shape is under the isolation pattern.

    MAGNETIC MEMORY DEVICES
    8.
    发明申请
    MAGNETIC MEMORY DEVICES 有权
    磁记忆装置

    公开(公告)号:US20160218145A1

    公开(公告)日:2016-07-28

    申请号:US14964251

    申请日:2015-12-09

    IPC分类号: H01L27/22 G11C11/16 H01L43/02

    摘要: Magnetic memory devices are provided. A magnetic memory device includes a Magnetic Tunnel Junction (MTJ) structure on a contact. Moreover, the magnetic memory device includes an insulating structure and an electrode between the MTJ structure and the contact. In some embodiments, a first contact area of the electrode with the MTJ structure is smaller than a second contact area of the insulating structure with the MTJ structure.

    摘要翻译: 提供磁存储器件。 磁存储器件包括在触点上的磁隧道结(MTJ)结构。 此外,磁存储器件包括绝缘结构和MTJ结构与触点之间的电极。 在一些实施例中,具有MTJ结构的电极的第一接触面积小于具有MTJ结构的绝缘结构的第二接触面积。

    Methods for manufacturing magnetic memory devices

    公开(公告)号:US09954164B2

    公开(公告)日:2018-04-24

    申请号:US15588776

    申请日:2017-05-08

    IPC分类号: H01L21/00 H01L43/12 H01L43/08

    CPC分类号: H01L43/12 H01L43/08

    摘要: Disclosed is a method for manufacturing a magnetic memory device. The method for manufacturing a magnetic memory device comprises sequentially forming a first magnetic layer, a tunnel barrier layer, and a second magnetic layer on a substrate, forming a boron absorption layer on the second magnetic layer, sequentially forming a metal capping layer and an oxygen donor layer on the boron absorption layer, and performing a heat treatment process to diffuse at least a portion of oxygen atoms included in the oxygen donor layer into the metal capping layer and the boron absorption layer. The metal capping layer has a greater oxygen diffusivity than the oxygen donor layer.

    Methods for Manufacturing Magnetic Memory Devices

    公开(公告)号:US20180006215A1

    公开(公告)日:2018-01-04

    申请号:US15588776

    申请日:2017-05-08

    IPC分类号: H01L43/12 H01L43/08

    CPC分类号: H01L43/12 H01L43/08

    摘要: Disclosed is a method for manufacturing a magnetic memory device. The method for manufacturing a magnetic memory device comprises sequentially forming a first magnetic layer, a tunnel barrier layer, and a second magnetic layer on a substrate, forming a boron absorption layer on the second magnetic layer, sequentially forming a metal capping layer and an oxygen donor layer on the boron absorption layer, and performing a heat treatment process to diffuse at least a portion of oxygen atoms included in the oxygen donor layer into the metal capping layer and the boron absorption layer. The metal capping layer has a greater oxygen diffusivity than the oxygen donor layer.