公开(公告)号：US20230207550A1

公开(公告)日：2023-06-29

申请号：US17563346

申请日：2021-12-28

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L25/50 ,  H01L25/0657 ,  H01L25/105 ,  H01L24/16 ,  H01L23/49827 ,  H01L2224/16146 ,  H01L2924/15311 ,  H01L2225/06513 ,  H01L2225/06541

摘要： The present application discloses a method for fabricating a semiconductor device including providing a first stacking structure comprising a first controller die, and a plurality of first storage dies sequentially stacked on the first controller die; providing a second stacking structure comprising a second controller die, and a plurality of second storage dies sequentially stacked on the second controller die; bonding the first controller die onto a bottom die through a plurality of first interconnect units; and bonding the second controller die onto the bottom die through a plurality of second interconnect units. The plurality of first storage dies respectively comprise a plurality of first storage units configured as a floating array. The plurality of second storage dies comprise a plurality of second storage units respectively comprising an insulator-conductor-insulator structure.

公开(公告)号：US20220093490A1

公开(公告)日：2022-03-24

申请号：US17031119

申请日：2020-09-24

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L23/485 ,  H01L21/02 ,  H01L23/00 ,  H01L21/311 ,  H01L21/033

摘要： The present disclosure relates to a semiconductor device with tilted insulating layers and a method for fabricating the semiconductor device with the tilted insulating layers. The semiconductor device includes a substrate, two conductive pillars positioned above the substrate and extended along a vertical axis, a first set of tilted insulating layers parallel to each other and positioned between the two conductive pillars, and a second set of tilted insulating layers parallel to each other and positioned between the two conductive pillars. The first set of tilted insulating layers are extended along a first direction slanted with respect to the vertical axis, the second set of tilted insulating layers are extended along a second direction slanted with respect to the vertical axis, and the first direction and the second direction are crossed.

公开(公告)号：US20210391212A1

公开(公告)日：2021-12-16

申请号：US16902692

申请日：2020-06-16

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L27/108

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a porous insulating layer positioned above the substrate, a first conductive feature positioned in the porous insulating layer, and covering liners including two top segments and two side segments. The two side segments are positioned on sidewalls of the first conductive feature, and the two top segments are positioned on top surfaces of the porous insulating layer.

公开(公告)号：US20220328400A1

公开(公告)日：2022-10-13

申请号：US17228131

申请日：2021-04-12

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L23/522 ,  H01L21/48 ,  H01L21/66 ,  H01L23/528 ,  H01L23/00

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a circuit layer positioned on the substrate and including a functional block positioned on the substrate, and a test pad positioned on the substrate and distal from the functional block, a redistribution structure positioned on the circuit layer and including a first conductive portion positioned over the functional block and electrically coupled to the functional block, and a second conductive portion positioned over the test pad and electrically coupled to the test pad, and a through semiconductor via physically and electrically coupled to the test pad.

公开(公告)号：US20210351185A1

公开(公告)日：2021-11-11

申请号：US16867214

申请日：2020-05-05

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L27/108 ,  H01L29/08 ,  H01L29/66

摘要： The present application discloses a semiconductor device with a tapering impurity region and the method for fabricating the semiconductor device with the tapering impurity region. The semiconductor device includes a substrate, a word line structure positioned in the substrate, an impurity region including an upper portion positioned adjacent to the word line structure and a lower portion positioned below the upper portion. The upper portion has a tapering cross-sectional profile.

公开(公告)号：US20210305208A1

公开(公告)日：2021-09-30

申请号：US16829665

申请日：2020-03-25

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L25/065 ,  H01L23/00

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure including a plurality of first conductive features adjacent to a top surface of the first semiconductor structure, a second semiconductor structure positioned above the first semiconductor structure and including a plurality of second conductive features adjacent to a bottom surface of the second semiconductor structure, and a connection structure positioned between the first semiconductor structure and the second semiconductor structure. The connection structure includes a connection layer electrically coupled to the plurality of first conductive features and the plurality of second conductive features, and a plurality of first porous interlayers positioned between the plurality of first conductive features and the plurality of second conductive features. A porosity of the plurality of first porous interlayers is between about 25% and about 100%.

公开(公告)号：US20210288052A1

公开(公告)日：2021-09-16

申请号：US17334397

申请日：2021-05-28

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L27/108 ,  H01L29/49 ,  H01L23/31 ,  H01L23/00 ,  H01L49/02

摘要： The present application discloses a method for fabricating a semiconductor device with a pad structure. The method includes providing a substrate, forming a capacitor structure above the substrate, forming a plurality of passivation layers above the capacitor structure, forming a pad opening in the plurality of passivation layers, performing a passivation process comprising soaking the pad opening in a precursor, and forming a pad structure in the pad opening. The precursor is dimethylaminotrimethylsilane or tetramethylsilane. Forming the pad structure in the pad opening comprises forming a pad bottom conductive layer comprising nickel in the pad opening and forming a pad top conductive layer on the pad bottom conductive layer. The pad top conductive layer comprises palladium, cobalt, or a combination thereof.

公开(公告)号：US20210125910A1

公开(公告)日：2021-04-29

申请号：US16663369

申请日：2019-10-25

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Shing-Yih SHIH ,  Tse-Yao HUANG

IPC分类号： H01L23/498 ,  H01L23/00

摘要： A semiconductor structure includes a first component and a second component bonded thereof. The first component includes a first interlayer dielectric (ILD) layer, a first interconnect structure, a first seal ring, and a first bonding layer. The first interconnect structure is in the first ILD layer and surrounded by the first seal ring. The first bonding layer covers the first ILD layer and the first interconnect structure, and has a portion surrounds the first seal ring. The second component includes a second ILD layer, a second interconnect structure, a second seal ring, and a second bonding layer. The second interconnect structure is in the second ILD layer and surrounded by the second seal ring. The second bonding layer is in contact with the first bonding layer and covers the second ILD layer and the second interconnect structure, and has a portion surrounds the second seal ring.

公开(公告)号：US20210118874A1

公开(公告)日：2021-04-22

申请号：US16658949

申请日：2019-10-21

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L27/088 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/423

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a first semiconductor unit having a first threshold voltage and including a first insulating stack in the substrate, a second semiconductor unit having a second threshold voltage and including a second insulating stack in the substrate, and a third semiconductor unit having a third threshold voltage and including a third insulating stack in the substrate. The first threshold voltage, the second threshold voltage, and the third threshold voltage are different from each other. A thickness of the first insulating stack is different from a thickness of the second insulating stack and a thickness of the third insulating stack. The thickness of the second insulating stack is different from the thickness of the third insulating stack.

公开(公告)号：US20210074639A1

公开(公告)日：2021-03-11

申请号：US16561489

申请日：2019-09-05

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao HUANG

IPC分类号： H01L23/532 ,  H01L23/528 ,  H01L27/108 ,  H01L21/311 ,  H01L21/768

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first lattice constant, a first word line positioned in the substrate, and a plurality of stress regions positioned adjacent to lower portions of sidewalls of the first word line. The plurality of stress regions have a second lattice constant, the second lattice constant of the plurality of stress regions is different from the first lattice constant of the substrate.