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公开(公告)号：US20210118838A1
公开(公告)日：2021-04-22
申请号：US16655222
申请日：2019-10-16
发明人： Wu-Der YANG , Chun-Huang YU
IPC分类号： H01L23/00 , H01L23/498 , H01L25/065
摘要： A chip-package device includes a substrate, a first chip, a first conductive layer, first wirings, and second wirings. The substrate includes a first top surface and first connection pads disposed on the first top surface. The first chip is disposed on the first top surface, and the first chip includes a second top surface and second connection pads disposed on the second top surface. The first conductive layer is disposed on the second top surface. The first wirings connect the first connection pads and the first conductive layer, and the second wirings connect the second connection pads and another side of the first conductive layer. Each of the first wirings and each of the second wirings respectively connect opposite sides of the first conductive layer.
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公开(公告)号：US20210111145A1
公开(公告)日：2021-04-15
申请号：US16600587
申请日：2019-10-14
发明人： Wu-Der YANG
IPC分类号： H01L23/00
摘要： A semiconductor package includes a substrate and a semiconductor chip, a lower conductive layer and an upper conductive layer sequentially stacked on the substrate. The substrate includes first and second connection pads formed thereon. The semiconductor chip includes third and fourth connection pads formed thereon. The upper conductive layer is connected to the first and the third connection pads via a first and a second wiring, and the lower conductive layer is connected to the second and the fourth connection pads via a third and a fourth wiring.
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公开(公告)号：US20210098413A1
公开(公告)日：2021-04-01
申请号：US16583289
申请日：2019-09-26
发明人： Wu-Der YANG
IPC分类号： H01L23/00
摘要： The disclosure provides a printed circuit board structure. The printed circuit board structure includes a printed circuit board, a semiconductor chip, a first pad, a second pad, a conductive wire, and a third pad. The semiconductor chip is disposed on the printed circuit board. The first pad is disposed on the semiconductor chip. The second pad is disposed on the printed circuit board. The conductive wire electrically connects the first pad and the second pad. The third pad is disposed between the first pad and the second pad. The conductive wire has a portion located on the third pad.
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4.发明公开公开(公告)号：US20240014168A1
公开(公告)日：2024-01-11
申请号：US17860392
申请日：2022-07-08
发明人： Wu-Der YANG
CPC分类号： H01L24/85 , H01L24/48 , H01L21/565 , H01L24/32 , H01L24/73 , H01L2924/30101 , H01L2224/48011 , H01L2224/48229 , H01L2224/32225 , H01L2224/73265 , H01L2224/85007 , H01L2224/48992 , H01L2924/15311 , H01L2924/182
摘要： The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a substrate. The method also includes attaching an electronic component to the substrate. The method further includes attaching a fixing feature to an upper surface of the electronic component. In addition, the method includes forming a bonding wire connecting the substrate and the electronic component. The bonding wire is at least partially disposed on the fixing feature.
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公开(公告)号：US20230119348A1
公开(公告)日：2023-04-20
申请号：US17451158
申请日：2021-10-18
发明人： Wu-Der YANG
IPC分类号： H01L23/00 , H01L25/065
摘要： A semiconductor package includes a package substrate, a semiconductor chip and a plurality of bonding wires. The package substrate includes a connection pad. The semiconductor chip is disposed over the package substrate and includes a chip pad, a bonding pad, and a redistribution layer. The bonding pad is closer to a periphery of the semiconductor chip than the chip pad. The redistribution layer is connected between the chip pad and the bonding pad. The bonding wires are connected in parallel between the connection pad and the bonding pad.
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公开(公告)号：US20210358878A1
公开(公告)日：2021-11-18
申请号：US15930437
申请日：2020-05-13
发明人： Wu-Der YANG
IPC分类号： H01L23/00 , H01L23/528 , H01L23/31
摘要： A semiconductor package includes a first semiconductor die, a first substrate, a second semiconductor die, and a second substrate. The first substrate is disposed on the first semiconductor die and includes a plurality of first metal line layers vertically spaced apart from each other, and each of the first metal line layers is electrically connected to one of the followings: a ground source and a plurality of power sources of different types. The second semiconductor die is disposed on the first substrate. The second substrate is disposed on the second semiconductor die and includes a plurality of second metal line layers vertically spaced apart from each other, and each of the second metal line layers is electrically connected to one of the followings: the ground source and the power sources of different types.
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公开(公告)号：US20240162126A1
公开(公告)日：2024-05-16
申请号：US18054919
申请日：2022-11-14
发明人： Wu-Der YANG
IPC分类号： H01L23/498 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31
CPC分类号： H01L23/49811 , H01L21/4853 , H01L21/56 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/08 , H01L24/32 , H01L24/80 , H01L24/83 , H01L2224/08225 , H01L2224/32225 , H01L2224/80205 , H01L2224/838
摘要： The present disclosure is related to a semiconductor package. The semiconductor package includes a substrate and a semiconductor chip. The substrate includes a window through a center portion of the substrate, in which the substrate has an inner sidewall surrounding the window and a conductive foil located on a top surface of the substrate, in which the conductive foil extends beyond the inner sidewall of the substrate. The semiconductor chip is located on the top surface of the substrate, in which the conductive foil is located between the substrate and the semiconductor chip, and the semiconductor chip has a bonding pad electrically connected to the conductive foil.
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公开(公告)号：US20230395558A1
公开(公告)日：2023-12-07
申请号：US17829601
申请日：2022-06-01
发明人： Wu-Der YANG
IPC分类号： H01L23/00
CPC分类号： H01L24/48 , H01L2924/30101 , H01L2924/182 , H01L24/73 , H01L24/32 , H01L2224/32225 , H01L2224/73265 , H01L2224/48091 , H01L2224/48011 , H01L2224/48229 , H01L2224/48992 , H01L2224/48997
摘要： A semiconductor device includes a substrate; an electronic component disposed on the substrate; a bonding wire comprising a first terminal connected to the electronic component and a second terminal connected to the substrate; and a supporter disposed between the first terminal and the second terminal of the bonding wire.
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公开(公告)号：US20230215507A1
公开(公告)日：2023-07-06
申请号：US17568100
申请日：2022-01-04
发明人： Wu-Der YANG
IPC分类号： G11C17/18 , G11C17/16 , H01L27/112 , G11C29/02
CPC分类号： G11C17/18 , G11C17/16 , H01L27/11206 , G11C29/027
摘要： The present disclosure provides a method for determining status of a fuse element of a memory device. The method includes providing the memory device including a first terminal and a second terminal and applying a first power signal on the first terminal of the semiconductor device. The memory device includes a configurable reference resistor unit electrically coupled to the fuse element. The method also includes obtaining an evaluation signal at the second terminal of the memory device and identifying the evaluation signal to determine whether the memory device is redundant. The configurable reference resistor unit includes a first resistor, a first transistor connected in parallel with the first resistor, and a first configurable unit connected to a gate of the first transistor. The first configurable unit is configured to generate a first configurable signal to turn on the first transistor.
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公开(公告)号：US20220352122A1
公开(公告)日：2022-11-03
申请号：US17243208
申请日：2021-04-28
发明人： Wu-Der YANG
IPC分类号： H01L25/065 , H01L23/31 , H01L23/13 , H01L23/498 , H01L21/48 , H01L21/56 , H01L25/00
摘要： The present application provides a semiconductor package and a manufacturing method for the semiconductor package. The semiconductor package includes a package substrate, a first semiconductor die, a second semiconductor die, a first encapsulant and a second encapsulant. The package substrate has a first side and a second side facing away from the first side, and the second side has a concave recessed from a planar portion of the second side. The first semiconductor die is attached to the first side of the package substrate. The second semiconductor die is attached to a recessed surface of the concave. The first encapsulant covers the first side of the package substrate and encapsulates the first semiconductor die. The second encapsulant fills up the concave and encapsulates the second semiconductor die.
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