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公开(公告)号：US11750205B1
公开(公告)日：2023-09-05
申请号：US17717386
申请日：2022-04-11
Applicant: NXP B.V.
Inventor： Edwin Schapendonk , Costantino Ligouras , Harry Neuteboom , Sergio Andrés Rueda Gómez
CPC classification number: H03M1/0663 , H03M1/0614 , H03M1/447
Abstract: A method for digital-to-analog signal conversion with distributed reconstructive filtering includes receiving a digital code synchronous to a clock signal having a first frequency, determining next states of a plurality of digital-to-analog current elements based on the digital code, combining a plurality of currents to generate an output current, and generating the plurality of currents. Each of the plurality of currents is based on a corresponding control signal of a plurality of control signals. The method includes generating the plurality of control signals based on the next states of the plurality of digital-to-analog current elements. Each of the plurality of control signals selects a first voltage level, a second voltage level, or a transitioning voltage level for use by a corresponding digital-to-analog current element. The transitioning voltage level linearly transitions from the first voltage level to the second voltage level over a predetermined number of periods of the clock signal.
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公开(公告)号：US20230133063A1
公开(公告)日：2023-05-04
申请号：US17518258
申请日：2021-11-03
Applicant: NXP B.V.
Inventor： Costantino Ligouras , Harry Neuteboom , Sergio Andres Rueda Gomez , Dave Sebastiaan Kroekenstoel , Peng Zhao
Abstract: Various embodiments relate to a detector circuit, including: a voltage source configured to produce a first voltage on a first output, a second voltage on a second output, and third voltage on a third output, wherein the first voltage is greater than the second voltage and the second voltage is greater than the third voltage; a first switch connected to the second output; a sampling capacitor connected to the switch, wherein the sampling capacitor is charged by the voltage source when the switch is closed; a first comparator with one input connected to the first output and a second input connected to the sampling capacitor; a second comparator with one input connected to the third output and a second input connected to the sampling capacitor; a multiplexer with a plurality of inputs configured to be connected to a plurality of terminals of an external circuit and an output connected to the sampling capacitor, the first input of the first comparator, and the first input of the second comparator; and a controller with inputs connected to the first comparator, the second comparator, and a clock generation unit, wherein the controller is configured to produce control signals to control the first switch and the multiplexer and wherein the controller is configured to produce an output signal indicting the presence of a current leak on one of the plurality of terminals.
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公开(公告)号：US11581876B1
公开(公告)日：2023-02-14
申请号：US17557943
申请日：2021-12-21
Applicant: NXP B.V.
Inventor： Muhammad Kamran , Dave Sebastiaan Kroekenstoel , Harry Neuteboom
Abstract: A signal generator includes a first voltage generator, a second voltage generator, an operational amplifier, and an oscillator. The first voltage generator generates a first voltage, and the second voltage generator generates a second voltage. The operational amplifier generates an amplified error signal based on the first voltage and the second voltage, and the oscillator generates a periodic signal based on the amplified error signal. The first voltage generator and the second voltage generator are configured to generate their respective voltages based on the periodic signal. As a result, frequency deviation in the periodic signal may be corrected, for example, without increasing the source current of the oscillator or the gain of the operational amplifier. Also, improved phase noise performance may also be achieved through an increase in loop gain.
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公开(公告)号：US11965847B2
公开(公告)日：2024-04-23
申请号：US17553274
申请日：2021-12-16
Applicant: NXP B.V.
Inventor： Costantino Ligouras , Sergio Andrés Rueda Gómez , Harry Neuteboom , Muhammad Kamran , Dave Sebastiaan Kroekenstoel , Rinze Ida Mechtildis Peter Meijer
IPC: G01N27/327 , G01N27/02 , G01N33/483
CPC classification number: G01N27/028 , G01N33/4836
Abstract: A method and apparatus are described for a reconfigurable architecture analog front end architecture for electrochemical sensors. In one example, an analog front end includes an electrode driver stage coupled to electrodes of an electrochemical sensor, and measurement channels coupled to the electrode driver stage to receive an electrode signal from the electrodes of the electrochemical sensor and to generate measurement results, the measurement channels configured to switch configurations to perform different measurements.
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5.发明公开公开(公告)号：US20240106456A1
公开(公告)日：2024-03-28
申请号：US17950582
申请日：2022-09-22
Applicant: NXP B.V.
Inventor： Dave Sebastiaan Kroekenstoel , Muhammad Kamran , Harry Neuteboom , Costantino Ligouras , Sergio Andrés Rueda Gómez
Abstract: Embodiments of sigma-delta analog-to-digital converter (ADC) circuits and a microphone circuit are disclosed. In an embodiment, a sigma-delta ADC circuit includes a pair of operational transconductance amplifiers (OTAs), a filter connected to the pair of OTAs, a quantizer connected to the filter, a differential digital-to-analog converter (DAC) connected to the quantizer, and a bias compensation circuit configured to measure a biasing condition of a first OTA of the pair of OTAs and to apply the biasing condition of the first OTA to a second OTA of the pair of OTAs to reduce Total Harmonic Distortion Plus Noise (THD+N) in the sigma-delta ADC circuit. An output of a microphone and a differential output of the differential DAC are inputted into input terminals of the pair of OTAs.
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Patent Agency Ranking
公开(公告)号：US20230194451A1
公开(公告)日：2023-06-22
申请号：US17553274
申请日：2021-12-16
Applicant: NXP B.V.
Inventor： Costantino Ligouras , Sergio Andrés Rueda Gómez , Harry Neuteboom , Muhammad Kamran , Dave Sebastiaan Kroekenstoel , Rinze Ida Mechtildis Peter Meijer
IPC: G01N27/02 , G01N33/483
CPC classification number: G01N27/028 , G01N33/4836
Abstract: A method and apparatus are described for a reconfigurable architecture analog front end architecture for electrochemical sensors. In one example, an analog front end includes an electrode driver stage coupled to electrodes of an electrochemical sensor, and measurement channels coupled to the electrode driver stage to receive an electrode signal from the electrodes of the electrochemical sensor and to generate measurement results, the measurement channels configured to switch configurations to perform different measurements.
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公开(公告)号：US20230145384A1
公开(公告)日：2023-05-11
申请号：US17523766
申请日：2021-11-10
Applicant: NXP B.V.
Inventor： Muhammad Kamran , Harry Neuteboom , Costantino Ligouras , Sergio Andrés Rueda Gómez , Dave Sebastiaan Kroekenstoel , Rinze Ida Mechtildis Peter Meijer
Abstract: A method and apparatus are described for bio-impedance measurement using voltage to current conversion. In one example, a bio-impedance transducer includes an input stage to receive a bio-impedance signal having an oscillating voltage from two electrodes, the electrodes being coupled to a body, a resistance across the two electrodes to determine an alternating current of the bio-impedance signal, a gain stage coupled to the resistance to amplify the alternating current, a down converter coupled to the gain stage to convert the amplified alternating current to a direct current bio-impedance signal, and an analog-to-digital converter coupled to the down converter to convert the direct current bio-impedance signal to a digital bio-impedance signal.
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8.发明公开公开(公告)号：US20240106455A1
公开(公告)日：2024-03-28
申请号：US17950486
申请日：2022-09-22
Applicant: NXP B.V.
Inventor： Dave Sebastiaan Kroekenstoel , Muhammad Kamran , Harry Neuteboom , Costantino Ligouras , Sergio Andrés Rueda Gómez
Abstract: Embodiments of multi-mode sigma-delta analog-to-digital converter (ADC) circuits and a microphone circuit are disclosed. In an embodiment, a multi-mode sigma-delta ADC circuit includes a pair of operational transconductance amplifiers (OTAs), a filter connected to the pair of OTAs, a quantizer connected to the filter, a differential digital-to-analog converter (DAC) connected to the quantizer, and a controller configured to switch the multi-mode sigma-delta ADC circuit between a single-ended operational mode, a pseudo differential operational mode, and a full differential operational mode to improve common mode rejection (CMR) performance by controlling the pair of OTAs. An output of a microphone and a differential output of the differential DAC are inputted into input terminals of the pair of OTAs.
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公开(公告)号：US11774517B2
公开(公告)日：2023-10-03
申请号：US17518258
申请日：2021-11-03
Applicant: NXP B.V.
Inventor： Costantino Ligouras , Harry Neuteboom , Sergio Andrés Rueda Gómez , Dave Sebastiaan Kroekenstoel , Peng Zhao
IPC: G01R31/52 , G01R31/68 , A61B5/145 , A61B5/1477
CPC classification number: G01R31/52 , G01R31/68 , A61B5/1477 , A61B5/14532
Abstract: Various embodiments relate to a detector circuit, including: a voltage source configured to produce a first voltage on a first output, a second voltage on a second output, and third voltage on a third output, wherein the first voltage is greater than the second voltage and the second voltage is greater than the third voltage; a first switch connected to the second output; a sampling capacitor connected to the switch, wherein the sampling capacitor is charged by the voltage source when the switch is closed; a first comparator with one input connected to the first output and a second input connected to the sampling capacitor; a second comparator with one input connected to the third output and a second input connected to the sampling capacitor; a multiplexer with a plurality of inputs configured to be connected to a plurality of terminals of an external circuit and an output connected to the sampling capacitor, the first input of the first comparator, and the first input of the second comparator; and a controller with inputs connected to the first comparator, the second comparator, and a clock generation unit, wherein the controller is configured to produce control signals to control the first switch and the multiplexer and wherein the controller is configured to produce an output signal indicting the presence of a current leak on one of the plurality of terminals.
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公开(公告)号：US10432260B1
公开(公告)日：2019-10-01
申请号：US16252843
申请日：2019-01-21
Applicant: NXP B.V.
Inventor： Dave Sebastiaan Kroekenstoel , Harry Neuteboom
Abstract: Aspects are directed to a wireless communications approach in which a signal is conveyed via one of a number of particular frequency bands. In one example, a tank circuit includes an inductor and multiple capacitive circuits, and a driver circuit includes multiple buffers. One of the buffers is responsive to the input signal and another of the buffers is not responsive to the input signal. The driver circuit is configured to drive the tank circuit through a respective capacitive circuit while coupled to a respective buffer at a node of the inductor. A tuning-drive circuit drives the tank circuit for communicating in one band of a selectably-tunable frequency range. The tuning-drive circuit includes selectable (buffer and capacitor) portions configured to selectively couple to the node, for an overall drive strength and an overall tuning capacitance, and for tuning the tank circuit to a selected frequency band for wireless communication.
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