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    MULT-LEVEL RECORDING IN A SUPERATTICE PHASE CHANGE MEMORY CELL
    1.
    发明申请
    MULT-LEVEL RECORDING IN A SUPERATTICE PHASE CHANGE MEMORY CELL 有权
    超级相变记忆体中的MULT-LEVEL RECORDING

    公开(公告)号：US20140376307A1

    公开(公告)日：2014-12-25

    申请号：US14163160

    申请日：2014-01-24

    Applicant: National Institute of Advanced Industrial Science and Technology

    Inventor： Toshimichi Shintani ,  Susumu Soeya

    IPC: G11C13/00

    CPC classification number: G11C13/0004 ,  G11C11/5678 ,  G11C13/0069 ,  H01L45/06 ,  H01L45/144

    Abstract: A phase-change device capable of realizing a multi-level record in a superlattice phase-change memory cell in which a superlattice phase-change material is used as a recording film, and thereby achieving the reduction in power consumption and the capacity increase is provided. To a phase-change memory cell composed of GeTe/Sb2Te3 superlattice or SnTe/Sb2Te3 superlattice, a SET pulse is once applied to form a SET state (low resistance state). Thereafter, recording pulses having respectively different voltage values between a voltage value forming the SET state and a voltage value forming a RESET state (high resistance state) are respectively applied to the superlattice phase-change memory cell twice or more. In this manner, a read resistance (SET resistance) corresponding to a recording pulse (SET pulse) and read resistances corresponding to each of the recording pulses are obtained, so that the multi-level record can be realized.

    Abstract translation: 提供一种能够在超晶格相变存储单元中实现多层记录的相变装置，其中使用超晶格相变材料作为记录膜，从而实现功耗和容量增加的降低 。 对于由GeTe / Sb2Te3超晶格或SnTe / Sb2Te3超晶格组成的相变存储单元，一次施加SET脉冲以形成SET状态（低电阻状态）。 此后，在超晶格相变存储器单元中分别将两个或更多个分别施加到形成SET状态的电压值和形成RESET状态的电压值（高电阻状态）之间具有不同电压值的记录脉冲。 以这种方式，获得对应于记录脉冲（SET脉冲）的读取电阻（SET电阻）和对应于每个记录脉冲的读取电阻，从而可以实现多级记录。

    Phase-change memory and semiconductor recording/reproducing device
    2.
    发明授权
    Phase-change memory and semiconductor recording/reproducing device 有权
    相变存储器和半导体记录/再现装置

    公开(公告)号：US09490428B2

    公开(公告)日：2016-11-08

    申请号：US14171033

    申请日：2014-02-03

    Applicant: National Institute of Advanced Industrial Science and Technology

    Inventor： Susumu Soeya ,  Toshimichi Shintani ,  Takahiro Odaka

    IPC: H01L29/18 ,  H01L29/00 ,  H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/144 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1608

    Abstract: Technology capable of improving performance of a phase-change memory is provided. A recording/reproducing film contains Sn (tin), Sb (antimony), and Te (tellurium) and also contains an element X having a bonding strength with Te stronger than a bonding strength between Sn and Te and a bonding strength between Sb and Te. Here, the recording/reproducing film has a (SnXSb)Te alloy phase, and this (SnXSb)Te alloy phase includes a self-assembled superlattice structure.

    Abstract translation: 提供了能够提高相变存储器的性能的技术。 记录/再现膜包含Sn（锡），Sb（锑）和Te（碲），并且还含有与Te和Te之间的接合强度比Te强的结合强度的元素X和Sb与Te之间的结合强度 。 这里，记录/再现膜具有（SnXSb）Te合金相，并且该（SnXSb）Te合金相包括自组装超晶格结构。

    Multi-level recording in a superlattice phase change memory cell
    3.
    发明授权
    Multi-level recording in a superlattice phase change memory cell 有权
    在超晶格相变存储器单元中进行多级记录

    公开(公告)号：US09177640B2

    公开(公告)日：2015-11-03

    申请号：US14163160

    申请日：2014-01-24

    Applicant: National Institute of Advanced Industrial Science and Technology

    Inventor： Toshimichi Shintani ,  Susumu Soeya

    IPC: G11C13/00 ,  G11C11/56 ,  H01L45/00

    CPC classification number: G11C13/0004 ,  G11C11/5678 ,  G11C13/0069 ,  H01L45/06 ,  H01L45/144

    Abstract: A phase-change device capable of realizing a multi-level record in a superlattice phase-change memory cell in which a superlattice phase-change material is used as a recording film, and thereby achieving the reduction in power consumption and the capacity increase is provided. To a phase-change memory cell composed of GeTe/Sb2Te3 superlattice or SnTe/Sb2Te3 superlattice, a SET pulse is once applied to form a SET state (low resistance state). Thereafter, recording pulses having respectively different voltage values between a voltage value forming the SET state and a voltage value forming a RESET state (high resistance state) are respectively applied to the superlattice phase-change memory cell twice or more. In this manner, a read resistance (SET resistance) corresponding to a recording pulse (SET pulse) and read resistances corresponding to each of the recording pulses are obtained, so that the multi-level record can be realized.

    Abstract translation: 提供一种能够在超晶格相变存储单元中实现多层记录的相变装置，其中使用超晶格相变材料作为记录膜，从而实现功耗和容量增加的降低 。 对于由GeTe / Sb2Te3超晶格或SnTe / Sb2Te3超晶格组成的相变存储单元，一次施加SET脉冲以形成SET状态（低电阻状态）。 此后，在超晶格相变存储器单元中分别将两个或更多个分别施加到形成SET状态的电压值和形成RESET状态的电压值（高电阻状态）之间具有不同电压值的记录脉冲。 以这种方式，获得对应于记录脉冲（SET脉冲）的读取电阻（SET电阻）和对应于每个记录脉冲的读取电阻，从而可以实现多级记录。

    PHASE-CHANGE MEMORY AND SEMICONDUCTOR RECORDING/REPRODUCING DEVICE
    6.
    发明申请
    PHASE-CHANGE MEMORY AND SEMICONDUCTOR RECORDING/REPRODUCING DEVICE 有权
    相变存储器和半导体记录/再现设备

    公开(公告)号：US20150144865A1

    公开(公告)日：2015-05-28

    申请号：US14171033

    申请日：2014-02-03

    Applicant: National Institute of Advanced Industrial Science and Technology

    Inventor： Susumu Soeya ,  Toshimichi Shintani ,  Takahiro Odaka

    IPC: H01L27/24 ,  H01L45/00

    CPC classification number: H01L45/144 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1608

    Abstract: Technology capable of improving performance of a phase-change memory is provided. A recording/reproducing film contains Sn (tin), Sb (antimony), and Te (tellurium) and also contains an element X having a bonding strength with Te stronger than a bonding strength between Sn and Te and a bonding strength between Sb and Te. Here, the recording/reproducing film has a (SnXSb)Te alloy phase, and this (SnXSb)Te alloy phase includes a self-assembled superlattice structure.

    Abstract translation: 提供了能够提高相变存储器的性能的技术。 记录/再现膜包含Sn（锡），Sb（锑）和Te（碲），并且还含有与Te和Te之间的接合强度比Te强的结合强度的元素X和Sb与Te之间的结合强度 。 这里，记录/再现膜具有（SnXSb）Te合金相，并且该（SnXSb）Te合金相包括自组装超晶格结构。

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