Abstract:
Provided is a method of manufacturing a crystallized stacked structural body excellent in manufacturing efficiency. The present invention is characterized by including: a stacked structural body forming step of forming a stacked structural body (7) in which an Sb2Te3 layer (5) having a thickness of from 2 nm to 10 nm and a GeTe layer (6) having a thickness of more than 0 nm and 4 nm or less are stacked, and a trace addition element (S or Se) is incorporated at a content of from 0.05 at % to 10.0 at % into the GeTe layer (6) on an orientation control layer (4) configured to give, to the Sb2Te3 layer (5) and the GeTe layer (6) at the time of their crystallization, a common crystal axis, the step being performed under a temperature of less than 100° C. including room temperature; an Sb2Te3 layer-crystallizing step of crystallizing the Sb2Te3 layer (5) by heating and holding the stacked structural body (7) at a first crystallization temperature of 100° C. or more and less than 170° C.; and a GeTe layer-crystallizing step of crystallizing the GeTe layer (6) by heating and holding the stacked structural body (7) in which the Sb2Te3 layer (5) is crystallized at a second crystallization temperature of 170° C. or more and 400° C. or less.
Abstract:
A crystal orientation layer laminated structure capable of widely selecting materials for a base substrate and an electrode substrate, an electronic memory using the crystal orientation layer laminated structure and a method for manufacturing the crystal orientation layer laminated structure are provided. The crystal orientation layer laminated structure according to the present invention has such a feature as including a substrate, including an orientation control layer which is laminated on the substrate, which is made of any of germanium, silicon, tungsten, germanium-silicon, germanium-tungsten and silicon-tungsten, and whose thickness is at least 1 nm or more, and including a first crystal orientation layer which is laminated on the orientation control layer, which is made of any of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe and Bi2Se3 as a main component, and which is oriented in a certain crystal orientation
Abstract:
Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of the record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure with a thin film containing Sb and a thin film containing Te. The solid memory can realize the number of times of repeated recording and erasing of 1015.
Abstract:
A spin electronic memory of the present invention includes: a pair of electrodes 1, 2, recording layers 6a, 6b, and 6c between the electrodes 1 and 2, the recording layer being formed by laminating first alloy layer 5 and second alloy layer 4, the first alloy layer 5 being formed to contain any one of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe, and Bi2Se3 as a principal component and to have a thickness of 2 nm to 10 nm, the second alloy layer 4 being formed to contain an alloy expressed by general formula (1) as a principal component; and spin injection layer 7 formed with a magnetic material to inject a spin into the recording layer with the magnetic material being magnetized, M1-xTex (1) where M represents an atom selected from atoms of Ge, Al, and Si, and x represents a value of 0.5 or more and less than 1.
Abstract:
A method of initializing a multiferroic element for obtaining a stable element operation includes applying at least one selected from a group consisting of an electric field and a magnetic field to the multiferroic element under a temperature condition equal to or higher than a phase transition temperature. The multiferroic element has a laminated structural body including a first alloy layer and a second alloy layer. The first alloy layer is formed by using any of antimony-tellurium, bismuth-tellurium and bismuth-selenium as a principal component. The second alloy layer is laminated on the first alloy layer, and formed by using a compound represented by the following general formula (1) as a principal component. The second alloy layer is configured to undergo phase transition between a reset phase and a set phase. Electric polarization is not caused in the reset phase, but caused in the set phase. The second alloy layer undergoes the phase transition from the reset phase to the set phase at the phase transition temperature.[Chemical Formula 1] M1-xTex (1) Here, in the above-mentioned general formula (1), M represents an atom of any of germanium, aluminum and silicon, and x represents a numerical value of 0.5 or more and lower than 1.
Abstract:
[Problem]: The problem of the present invention is to provide a stacked structure excellent in stability of atomic arrangement, a method of manufacturing same, and a semiconductor device using the stacked structure. [Solution]: The stacked structure of the present invention is characterized in that it has an alloy layer A having germanium and tellurium as a main component and an alloy layer B having tellurium and either of antimony or bismuth as a main component, and at least either of the alloy layer A or the alloy layer B contains at least either of sulfur or selenium as a chalcogen atom.
Abstract:
A method of initializing a multiferroic element for obtaining a stable element operation includes applying at least one selected from a group consisting of an electric field and a magnetic field to the multiferroic element under a temperature condition equal to or higher than a phase transition temperature. The multiferroic element has a laminated structural body including a first alloy layer and a second alloy layer. The first alloy layer is formed by using any of antimony-tellurium, bismuth-tellurium and bismuth-selenium as a principal component. The second alloy layer is laminated on the first alloy layer, and formed by using a compound represented by the following general formula (1) as a principal component. The second alloy layer is configured to undergo phase transition between a reset phase and a set phase. Electric polarization is not caused in the reset phase, but caused in the set phase. The second alloy layer undergoes the phase transition from the reset phase to the set phase at the phase transition temperature.[Chemical Formula 1] M1-xTex (1) Here, in the above-mentioned general formula (1), M represents an atom of any of germanium, aluminum and silicon, and x represents a numerical value of 0.5 or more and lower than 1.
Abstract:
Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of the record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure with a thin film containing Sb and a thin film containing Te. The solid memory can realize the number of times of repeated recording and erasing of 1015.
Abstract:
A crystal orientation layer laminated structure capable of widely selecting materials for a base substrate and an electrode substrate, an electronic memory using the crystal orientation layer laminated structure and a method for manufacturing the crystal orientation layer laminated structure are provided. The crystal orientation layer laminated structure according to the present invention has such a feature as including a substrate, including an orientation control layer which is laminated on the substrate, which is made of any of germanium, silicon, tungsten, germanium-silicon, germanium-tungsten and silicon-tungsten, and whose thickness is at least 1 nm or more, and including a first crystal orientation layer which is laminated on the orientation control layer, which is made of any of SbTe, Sb2Te3, BiTe, Bi2Te3, BiSe and Bi2Se3 as a main component, and which is oriented in a certain crystal orientation.
Abstract:
Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure of thin films including Ge and thin films including Sb. The solid memory can realize the number of times of repeated recording and erasing of 1015.