公开(公告)号：US06359605B1

公开(公告)日：2002-03-19

申请号：US09329029

申请日：1999-06-09

Applicant: Alan G. Knapp ,  Neil C. Bird

Inventor： Alan G. Knapp ,  Neil C. Bird

IPC: G09G330

CPC classification number: G09G3/3241 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2310/0254 ,  G09G2310/0256 ,  G09G2310/0262 ,  G09G2320/02

Abstract: An active matrix electroluminescent display device has an array of current—driven electroluminescent display elements (20), for example comprising organic electroluminescent material, whose operations are each controlled by an associated switching means (10) to which a drive signal for determining a desired light output is supplied in a respective address period and which is arranged to drive the display element according to the drive signal following the address period. Each switching means comprises a current mirror circuit (24, 25, 30, 32) which samples and stores the drive signal with one transistor (24) of the circuit controlling the drive current through the display element (20) and having its gate connected to a storage capacitance (30) on which a voltage determined by the drive signal is stored. Through the use of current mirror circuits improved uniformity of light outputs from the display elements in the array is obtained.

公开(公告)号：US6108438A

公开(公告)日：2000-08-22

申请号：US63847

申请日：1998-04-21

Applicant: Neil C. Bird ,  Gerard F. Harkin

Inventor： Neil C. Bird ,  Gerard F. Harkin

IPC: G01B7/28 ,  G06K9/00 ,  G06K11/00

CPC classification number: G06K9/0002

Abstract: A fingerprint sensing device comprises an array of sense elements (12) which each include a sense electrode (33), providing in combination with an overlying fingerprint part a capacitance (35), and first and second diode devices (30, 31) connected respectively between the sense electrode and associated ones (18, 20) of first and second sets (e.g. row and column) address conductors. An address circuit (22, 24) connected to the address conductors biases the diode devices in a respective address period such that a potential is applied via the first address conductor and the first diode device to the sense electrode and thereafter stored charge, indicative of the capacitance, is transferred via the second diode device to the second address conductor. The device offers fast, reliable, scanning and can conveniently be implemented using thin film technology for low cost and compactness.

Abstract translation: 指纹感测装置包括感测元件阵列（12），每个感测元件（12）包括感测电极（33），与覆盖的指纹部分组合提供电容（35），以及分别连接的第一和第二二极管器件（30,31） 在第一和第二组（例如行和列）地址导体的感测电极和相关联的（18,20）之间。 连接到地址导体的地址电路（22,24）在相应的寻址周期中对二极管器件施加偏压，使得经由第一寻址导体和第一二极管器件将电位施加到感测电极，然后存储电荷， 电容经由第二二极管器件传送到第二地址导体。 该设备提供快速，可靠的扫描，可以方便地使用薄膜技术实现低成本和紧凑。

公开(公告)号：US5912578A

公开(公告)日：1999-06-15

申请号：US781573

申请日：1997-01-09

Applicant: Neil C. Bird

Inventor： Neil C. Bird

IPC: H03K17/74 ,  H03K17/76 ,  H03K17/00

CPC classification number: H03K17/76 ,  H03K17/74

Abstract: An array of electrical elements is arranged in rows and columns, signals being read out from the column conductors. Each column has a multiplexer switch so that signals from a number of columns may be switched to a common output. Each multiplexer switch comprises a diode bridge (36-39) having an input (60) and an output (34). Current is supplied to the diode bridge through a supply diode (52) and drained from the bridge through a drain diode (54), for controlling the switching of the bridge. The all-diode switch may be integrated on the substrate of the array and has a substantially linear switching response.

Abstract translation: 电子元件阵列以行和列布置，从列导体读出信号。 每列具有多路复用器开关，使得来自多个列的信号可以切换到公共输出。 每个复用器开关包括具有输入（60）和输出（34）的二极管电桥（36-39）。 通过电源二极管（52）将电流提供给二极管电桥，并从桥接器通过漏极二极管（54）排出，用于控制桥的开关。 全二极管开关可以集成在阵列的衬底上并且具有基本线性的开关响应。

公开(公告)号：US5900767A

公开(公告)日：1999-05-04

申请号：US666111

申请日：1996-06-19

Applicant: Neil C. Bird ,  Gerard F. Harkin

Inventor： Neil C. Bird ,  Gerard F. Harkin

IPC: H01L27/146 ,  H04N5/359 ,  H04N5/374 ,  H03K17/74

CPC classification number: H04N5/374 ,  H04N5/359 ,  H04N5/3742

Abstract: A large-area electronic device comprises an array (1) of device elements (2,3) coupled to row and column conductors (A and B). The column conductors (B) are arranged in groups, (e.g M, M+1, M+2), and a column multiplexer circuit (C) couples the column conductors (B) of a respective group to a respective common terminal (5). The present invention provides a compatible multiplexer circuit (C) for the array (1), the operation of the circuit (C) using electrical switching rather than optical switching. This multiplexer circuit (C) for each column conductor comprises a diode bridge (SD3 to SD6) and may include a clamping switch (SD1, SD2). A signal is transmitted between the column conductor (B) and a common output terminal (5) in a first state of the diode bridge (SD3 to SD6). The potential of the column conductor (B) is clamped by the clamping switch (SD1, SD2) in a second state of the diode bridge. Each arm (11,12) of the bridge comprises a respective pair of diodes (SD3, SD4), (SD5, SD6) having the same polarity as each other between two current sources (21,22). The respective column conductor (B) is coupled to the diode node (13) of the first arm (11). The common terminal (5) is coupled to the diode node (14) of the second arm (12). Control lines (16,17) apply switching voltages (Vx, Vy) for switching the clamping switch (SD1, SD2) and bridge (SD3 to SD6). Such multiplexer circuits (C) in accordance with the present invention can readily be constructed with the same technology type(s) of circuit elements (e.g. thin-film diodes or diode-connected thin-film transistors) for the bridge and clamping switch as used for the device elements of the array (1). The invention also provides a control method which reduces the peak current flowing in the diode bridge.

Abstract translation: 大面积电子设备包括耦合到行和列导体（A和B）的器件元件（2,3）的阵列（1）。 列导体（B）分成几组（例如M，M + 1，M + 2），列复用器电路（C）将各组的列导体（B）与相应的公共端 ）。 本发明提供了一种用于阵列（1）的兼容多路复用器电路（C），电路（C）的操作使用电开关而不是光开关。 用于每个列导体的多路复用器电路（C）包括二极管桥（SD3至SD6），并且可以包括钳位开关（SD1，SD2）。 在二极管电桥（SD3〜SD6）的第一状态下，在列导体（B）和公共输出端子（5）之间传输信号。 在二极管桥的第二状态下，列导体（B）的电位被钳位开关（SD1，SD2）钳位。 桥的每个臂（11,12）包括在两个电流源（21,22）之间彼此具有相同极性的相应的一对二极管（SD3，SD4），（SD5，SD6）。 相应的列导体（B）耦合到第一臂（11）的二极管节点（13）。 公共端子（5）耦合到第二臂（12）的二极管节点（14）。 控制线（16,17）施加用于切换钳位开关（SD1，SD2）和桥（SD3至SD6）的开关电压（Vx，Vy）。 根据本发明的这种多路复用器电路（C）可以容易地用与所使用的桥接和钳位开关相同的技术类型的电路元件（例如，薄膜二极管或二极管连接的薄膜晶体管）构成 对于阵列（1）的设备元素。 本发明还提供一种降低在二极管桥中流动的峰值电流的控制方法。

公开(公告)号：US5410502A

公开(公告)日：1995-04-25

申请号：US277443

申请日：1994-07-19

Applicant: Neil C. Bird

Inventor： Neil C. Bird

IPC: G06K7/12 ,  G11C7/00 ,  G11C13/04 ,  H04N5/907 ,  G11C11/42

CPC classification number: G11C7/005 ,  G11C13/04

Abstract: In an opto-electronic memory system having a memory element (14), for example an optical data card, in which optically-encoded data is stored in rows of memory locations (17) and reading elements (10,12) comprising a photosensitive element array (12) and operable to read out stored data in response to illumination of the memory locations, data is stored at memory locations as colors representing different data values and the memory locations are addressed with reading light of different colors in sequence, thereby enabling higher data storage capacities to be obtained. The memory locations may be reflective or transmissive. The reading elements may comprise linear or two dimensional arrays of photosensitive elements.

Abstract translation: 在具有存储元件（14）的光电存储器系统中，例如光学数据卡，其中光学编码的数据被存储在行的存储器位置（17）和读取元件（10,12）中，读取元件（10,12）包括感光元件 阵列（12）并且可操作以响应于存储器位置的照明读出存储的数据，数据被存储在存储器位置，作为表示不同数据值的颜色，并且存储器位置按顺序读取不同颜色的光来寻址，从而使得能够更高 要获得的数据存储容量。 存储器位置可以是反射的或透射的。 读取元件可以包括光敏元件的线性或二维阵列。

公开(公告)号：US06590556B2

公开(公告)日：2003-07-08

申请号：US09935882

申请日：2001-08-23

Applicant: Jason R. Hector ,  Neil C. Bird

Inventor： Jason R. Hector ,  Neil C. Bird

IPC: G09G336

CPC classification number: G09G3/3696 ,  G09G3/3648 ,  G09G2310/06

Abstract: A display device has row driver circuitry (30) providing row address signals and column address circuitry (32) providing pixel drive signals. The row address signals comprise a plurality of voltage levels (V1-V4) to implement a desired drive scheme. The column address circuitry comprises circuitry (70) for generating low voltage representations of at least some of the row address signals. The row address circuitry comprises a conversion circuit (72) for converting the representations into the row address signal levels, at least one of has a high voltage magnitude. The invention provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.

Abstract translation: 显示装置具有提供行地址信号的行驱动器电路（30）和提供像素驱动信号的列地址电路（32）。 行地址信号包括多个电压电平（V1-V4），以实现期望的驱动方案。 列地址电路包括用于产生至少一些行地址信号的低电压表示的电路（70）。 行地址电路包括用于将表示转换为行地址信号电平的转换电路（72），其中至少一个具有高电压幅度。 本发明提供了一种架构，其在行和列驱动器之间最佳地划分行电压供应电路的不同部分。 这使得能够提供可以使功率效率更高的简化电源。

公开(公告)号：US6054746A

公开(公告)日：2000-04-25

申请号：US82448

申请日：1998-05-20

Applicant: Neil C. Bird ,  Ian D. French ,  Brian P. McGarvey

Inventor： Neil C. Bird ,  Ian D. French ,  Brian P. McGarvey

IPC: H01L27/14 ,  H01L27/146 ,  H01L31/10 ,  H04N1/028 ,  H01L31/075 ,  H01L31/105 ,  H01L31/117

CPC classification number: H01L27/14643

Abstract: An image sensor comprising an array of pixels 2, each pixel 2 including a pin or nip photodiode P. At least the intrinsic semiconductor layer of the photodiodes of a group of pixels is shared between those pixels and acts as a barrier to reduce edge leakage currents. A group of pixels may be a row of pixels, or may be all pixels of the array.

Abstract translation: 包括像素阵列2的图像传感器，每个像素2包括一个引脚或夹持光电二极管P.一组像素的光电二极管的至少本征半导体层在这些像素之间共享，并作为屏障来减少边缘漏电流 。 一组像素可以是像素行，或者可以是阵列的所有像素。

公开(公告)号：US5973312A

公开(公告)日：1999-10-26

申请号：US22452

申请日：1998-02-12

Applicant: Catherine J. Curling ,  Neil C. Bird

Inventor： Catherine J. Curling ,  Neil C. Bird

IPC: H01L31/10 ,  H01L27/146 ,  H01J40/14

CPC classification number: H01L27/14609

Abstract: The array comprises an insulating substrate with diode-capacitor pixels disposed over conductors on the substrate. A single mask is used to etch the pixel stacks, and each pixel stack is wider than the conductor beneath. As a result, the mask alignment does not influence the pixel characteristics.

Abstract translation: 该阵列包括绝缘衬底，其具有设置在衬底上的导体上的二极管电容器像素。 使用单个掩模来蚀刻像素堆叠，并且每个像素堆叠比下面的导体更宽。 结果，掩模对准不影响像素特性。

公开(公告)号：US5784476A

公开(公告)日：1998-07-21

申请号：US934302

申请日：1997-09-19

Applicant: Neil C. Bird

Inventor： Neil C. Bird

IPC: H04R3/00 ,  H03G3/30 ,  H03G3/32 ,  H03G7/00 ,  H04R5/04 ,  H03G3/00

CPC classification number: H03G3/32 ,  H03G7/002 ,  H04R5/04 ,  H04R2420/01

Abstract: Audio signal reproduction apparatus, for example, an in-car entertainment system, includes a number of audio signal sources (I--I to I-N) which are selected by means of a selector (2) and fed to an AGC circuit (4) before being applied to an amplifier (6) and loudspeaker (7). The AGC circuit (4) includes an amplitude analyzer (42) and a low-pass filter (43) to produce an output signal (44) which controls the gain of an amplifier (41). The arrangement is such that the AGC circuit only causes a gain change when the audio signal lies outside a predetermined amplitude band for a given minimum time period. Thus only long "too loud" or "too soft" passages cause a gain change and transients pass through the arrangement without causing a gain change.

Abstract translation: 音频信号再现装置，例如车载娱乐系统，包括通过选择器（2）选择并在施加之前馈送到AGC电路（4）的多个音频信号源（II至IN） 到放大器（6）和扬声器（7）。 AGC电路（4）包括振幅分析器（42）和低通滤波器（43），以产生控制放大器（41）的增益的输出信号（44）。 这种布置使得当音频信号在给定的最小时间周期之前位于预定幅度频带之外时，AGC电路仅引起增益改变。 因此，只有长时间的“太大”或“太软”通道会导致增益变化和瞬变通过安排而不会导致增益变化。

公开(公告)号：US5569908A

公开(公告)日：1996-10-29

申请号：US398318

申请日：1995-03-03

Applicant: Neil C. Bird ,  Gerard F. Harkin

Inventor： Neil C. Bird ,  Gerard F. Harkin

IPC: H01L27/146 ,  H04N5/32 ,  H04N5/335 ,  H04N5/359 ,  H04N5/374 ,  H01L27/00

CPC classification number: H04N5/374 ,  H04N5/3597 ,  H01L27/14643

Abstract: The storage elements (3) of an array (2) are arranged in rows and columns with the storage elements (3) in a column being coupled to a first conductor (4) and the storage elements (3) in a row being coupled to a second (5) and to a third (6) conductor. Each storage element (3) in a row is coupled to the associated second conductor (5) by a first rectifying element (D1) and to the associated third conductor (6) by a second rectifying element (D2) with the first and second rectifying elements (D1 and D2) allowing the passage of current when forward-biased by applied voltages. The third conductors (6) also form the second conductors (5) of any adjacent rows. The first and second rectifying elements (D1' and D2') of alternate rows (N, N+2, N+4, . . . ) are oppositely oriented to those (D1" and D2") in the remaining rows (N+1, N+3, . . . ). An arrangement (7) is provided for applying voltages to the second and third conductors (5 and 6) for enabling only the first and second rectifying elements (D1 and D2) associated with a selected row of storage elements (3) to be forward-biased to allow charge stored at the storage elements of the selected row to be read. This allows the problems of incomplete recharging of storage elements (3) to be reduced without having to increase the overall number of conductors.

Abstract translation: 阵列（2）的存储元件（3）以行和列布置，其中存储元件（3）在列中耦合到第一导体（4），并且一行中的存储元件（3）耦合到 第二（5）和第三（6）导体。 一排中的每个存储元件（3）由第一整流元件（D1）耦合到相关联的第二导体（5），并通过第二整流元件（D2）耦合到相关联的第三导体（6），第一和第二整流元件 元件（D1和D2）允许当由施加的电压正向偏置时电流通过。 第三导体（6）也形成任何相邻行的第二导体（5）。 交替行（N，N + 2，N + 4，...）的第一和第二整流元件（D1'和D2'）与其余行中的那些（D1“和D2”）相反地定向 N + 1，N + 3，...）。 提供了一种用于向第二和第三导体（5和6）施加电压的装置（7），用于仅使与所选行的存储元件（3）相关联的第一和第二整流元件（D1和D2） 偏置以允许存储在所选行的存储元件上的电荷被读取。 这就可以减少存储元件（3）不充分的不充分问题，而不必增加导体的总数。