公开(公告)号：US6020838A

公开(公告)日：2000-02-01

申请号：US186314

申请日：1998-11-04

申请人： Niels Knudsen ,  Mark Whittington

发明人： Niels Knudsen ,  Mark Whittington

IPC分类号： H03M3/02 ,  H03M3/00

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for reducing linearity errors in a delta-sigma converter. The linearity errors in the delta-sigma converter are modeled by generating a set of digital signals representative of an inputted sine wave. The set of digital signals are low-pass filtered and subjected to a fast Fourier transform algorithm to generate a frequency domain representation of the sine wave. Thereafter, a net linearity error spectrum is removed from the frequency domain representation and inverse Fourier transform back into the time domain. The filtered set of digital signals are also sorted into subsets of digital signals where each signal in a subset corresponds to a particular output of a delta-sigma modulator contained within the delta-sigma converter. A fast Fourier transform algorithm is applied to each of the filtered subsets of digital signals to generate a frequency domain representation thereof. Specific linearity errors are generated by applying an inverse Fourier transform algorithm to each of the specific linearity error spectrums in the frequency domain representations of the filtered subsets of digital signals. Thereafter, linearity error correction coefficients are generated as a function of the net linearity error and the specific linearity errors. The linearity error correction coefficients are used to generate entries in a look-up table where the entries are adjustable by digital outputs of the delta-sigma modulator. The look-up table is used to correct digital signals outputted by the delta-sigma modulator prior to decimation and digital filter.

摘要翻译： 用于减小Δ-Σ转换器中的线性误差的系统和方法。 Δ-Σ转换器中的线性误差通过产生代表​​输入的正弦波的一组数字信号来建模。 该组数字信号被低通滤波并经受快速傅立叶变换算法以产生正弦波的频域表示。 此后，将净线性误差谱从频域表示和逆傅里叶变换中移除回时域。 经滤波的数字信号组也被分类为数字信号的子集，其中子集中的每个信号对应于包含在Δ-Σ转换器内的Δ-Σ调制器的特定输出。 快速傅立叶变换算法被应用于数字信号的滤波子集中的每一个以产生其频域表示。 通过对经过滤波的数字信号子集的频域表示中的每个特定线性误差谱应用逆傅里叶变换算法来产生特定的线性误差。 此后，产生线性误差校正系数作为净线性误差和特定线性误差的函数。 线性误差校正系数用于在查询表中生成条目，其中条目可由delta-Σ调制器的数字输出调节。 查找表用于在抽取和数字滤波之前校正由Δ-Σ调制器输出的数字信号。

公开(公告)号：US07443332B2

公开(公告)日：2008-10-28

申请号：US11690952

申请日：2007-03-26

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M1/38

CPC分类号： H03M1/124 ,  H03M1/167

摘要： A Sampled Pipeline Subranging Converter (SPSC) may include at least one stage—e.g. at least the input stage—operating in a time-continuous fashion. In the time continuous input stage, the analog input may be processed in two parallel paths. A lower path may comprise a track-and-hold (T/H) element, an Analog-to-Digital-Converter (ADC) and a Digital-to-Analog-Converter (DAC). The T/H element may be optional and may be present if required by the ADC. The signal entering the lower path may be sampled at the desired conversion rate. The time continuous stage(s) may additionally be configured with an upper path that includes a delay element configured to receive the analog input, a Low-Pass (LP) filter coupled to the delay element, and an anti alias filter. The output generated by the DAC may be subtracted from the output of the LP filter, and the resulting difference signal may be provided to the anti alias filter, which in turn may generate the residue (or error) output. The digital output of the time continuous converter may be calculated by combining the digital outputs of the various sections.

摘要翻译： 采样管线子转换器（SPSC）可以包括至少一个级 - 例如， 至少输入级 - 以时间连续的方式操作。 在时间连续输入级中，模拟输入可以以两个并行的路径进行处理。 较低路径可以包括跟踪保持（T / H）元件，模数转换器（ADC）和数模转换器（DAC）。 T / H元件可以是可选的，如果ADC需要，可以存在T / H元件。 可以以期望的转换速率对进入较低路径的信号进行采样。 时间连续级还可以被配置为具有被配置为接收模拟输入的延迟元件，耦合到延迟元件的低通滤波器（LP）滤波器）和反混叠滤波器的上路径。 可以从LP滤波器的输出中减去由DAC产生的输出，并将得到的差分信号提供给反混淆滤波器，反滤波器又可以产生残差（或误差）输出。 可以通过组合各部分的数字输出来计算时间连续变换器的数字输出。

公开(公告)号：US6049298A

公开(公告)日：2000-04-11

申请号：US200543

申请日：1998-11-25

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M3/02 ,  H03M1/06

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for reducing linearity errors in an A/D converter, such as a delta-sigma converter. The linearity errors in the delta-sigma converter are modeled by generating a set of digital signals representative of an inputted sine wave. The set of digital signals are low-pass filtered and subjected to a fast Fourier transform algorithm to generate a frequency domain representation of the sine wave. Thereafter, a net linearity error spectrum is removed from the frequency domain representation and inverse Fourier transform back into the time domain. The filtered set of digital signals are also sorted into subsets of digital signals where each signal in a subset corresponds to a particular output of a delta-sigma modulator contained within the delta-sigma converter. A fast Fourier transform algorithm is applied to each of the filtered subsets of digital signals to generate a frequency domain representation thereof. Specific linearity errors are generated by applying an inverse Fourier transform algorithm to each of the specific linearity error spectrums in the frequency domain representations of the filtered subsets of digital signals. Thereafter, linearity error correction coefficients are generated as a function of the net linearity error and the specific linearity errors. The linearity error correction coefficients are used to generate entries in a look-up table where the entries are adjustable by digital outputs of the delta-sigma modulator. The look-up table is used to correct digital signals outputted by the delta-sigma modulator prior to decimation and digital filter.

摘要翻译： 用于降低A / D转换器（例如Δ-Σ转换器）中的线性误差的系统和方法。 Δ-Σ转换器中的线性误差通过产生代表​​输入的正弦波的一组数字信号来建模。 该组数字信号被低通滤波并经受快速傅立叶变换算法以产生正弦波的频域表示。 此后，将净线性误差谱从频域表示和逆傅里叶变换中移除回时域。 经滤波的数字信号组也被分类为数字信号的子集，其中子集中的每个信号对应于包含在Δ-Σ转换器内的Δ-Σ调制器的特定输出。 快速傅立叶变换算法被应用于数字信号的滤波子集中的每一个以产生其频域表示。 通过对经过滤波的数字信号子集的频域表示中的每个特定线性误差谱应用逆傅里叶变换算法来产生特定的线性误差。 此后，产生线性误差校正系数作为净线性误差和特定线性误差的函数。 线性误差校正系数用于在查询表中生成条目，其中条目可由delta-Σ调制器的数字输出调节。 查找表用于在抽取和数字滤波之前校正由Δ-Σ调制器输出的数字信号。

公开(公告)号：US5955979A

公开(公告)日：1999-09-21

申请号：US929707

申请日：1997-09-15

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M1/08 ,  H03M1/74 ,  H03M1/06

CPC分类号： H03M1/0863 ,  H03M1/745

摘要： A system and method for compensating for glitches in a D/A converter, particularly in systems where the glitch is not constant during the sample period. In the preferred embodiment of the invention, the system represents the glitch as a constant deviation during the sample period for the glitch. The system uses a compensation signal having a constant deviation with an area corresponding to the area of the glitch. This approximation in the frequency domain becomes more accurate for lower frequencies and is especially suitable in an over-sampled system. By treating and compensating the glitch as a constant deviation from the ideal signal during one sampling cycle, it is possible to cancel the spectral effects of the glitch at low frequencies. This approximation enables glitch compensation in a sampled signal.

摘要翻译： 用于补偿D / A转换器中的毛刺的系统和方法，特别是在采样周期内毛刺不恒定的系统中。 在本发明的优选实施例中，系统在毛刺的采样周期期间表示毛刺作为恒定偏差。 该系统使用具有恒定偏差的补偿信号，区域对应于毛刺的面积。 在频域中的这种近似对于较低频率变得更准确，并且特别适用于过采样系统。 通过在一个采样周期期间将毛刺处理和补偿与理想信号的恒定偏差，可以在低频下消除毛刺的光谱效应。 该近似使得采样信号中的毛刺补偿成为可能。

公开(公告)号：US06583741B1

公开(公告)日：2003-06-24

申请号：US09710473

申请日：2000-11-08

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M300

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for calibrating an analog to digital (A/D) converter. The A/D converter includes an internal D/A converter, wherein the internal D/A converter includes a plurality of current generators, and wherein one or more of the current generators may produce linearity errors in the A/D converter. The A/D converter includes a switching element connected to the internal D/A converter. During calibration, the switching element operates to adjust connections to the current generators in the internal D/A converter one or more times according to different switching patterns, thereby causing different ones of the current generators to be stimulated by an input to the A/D converter. This avoids the necessity of using a complex and costly waveform generator input during calibration, which would normally be required to ensure that all of the current generators in the internal D/A converter are stimulated. Rather, a much simpler input can be used in calibrating the A/D converter, thereby reducing cost. A plurality of output digital signals from the A/D converter are recorded during calibration, wherein these recorded signals contain linearity error information associated with the respective current generators. This linearity error information may be extracted and used in calibrating the A/D converter.

摘要翻译： 一种用于校准模数（A / D）转换器的系统和方法。 A / D转换器包括内部D / A转换器，其中内部D / A转换器包括多个电流发生器，并且其中一个或多个电流发生器可能在A / D转换器中产生线性误差。 A / D转换器包括连接到内部D / A转换器的开关元件。 在校准期间，开关元件工作以根据不同的开关模式调节与内部D / A转换器中的电流发生器的连接一次或多次，从而使得不同的电流发生器被A / D的输入激励 转换器。 这避免了在校准期间需要使用复杂且昂贵的波形发生器输入，通常需要这样来确保内部D / A转换器中的所有电流发生器被激励。 相反，可以使用更简单的输入来校准A / D转换器，从而降低成本。 在校准期间记录来自A / D转换器的多个输出数字信号，其中这些记录信号包含与各个电流发生器相关联的线性误差信息。 该线性误差信息可以被提取并用于校准A / D转换器。

公开(公告)号：US06373423B1

公开(公告)日：2002-04-16

申请号：US09461173

申请日：1999-12-14

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M136

CPC分类号： H03M1/187 ,  H03M1/182 ,  H03M1/365

摘要： A flash A/D conversion system and method with a reduced number of comparators. The voltage range applied by the comparators is moved or adjusted to provide an A/D converter with a much greater voltage range. The system comprises a reduced plurality of comparators each coupled to receive an analog input signal, and a decoder coupled to receive the outputs of the comparators. Each comparator also receives a respective comparator reference signal for comparison with the analog input signal, and outputs a digital value indicative of the comparison between the analog input signal and the respective comparator reference signal. In one embodiment, a dynamic reference controller dynamically outputs one or more dynamic reference voltages to the plurality of comparators, wherein the comparators may receive different comparator reference voltages for comparing with the analog input signal. The dynamic reference controller thus may provide a sliding range voltage window for use in the analog-to-digital conversion process, wherein the input signal is maintained within the voltage window. In another embodiment, a feedback signal is used to reduce the voltage range of the analog input signal, thereby enabling a reduced number of comparators.

摘要翻译： 闪存A / D转换系统和减少比较器数量的方法。 由比较器施加的电压范围被移动或调整，以提供具有更大电压范围的A / D转换器。 该系统包括多个比较器，每个比较器被耦合以接收模拟输入信号，以及解码器，被耦合以接收比较器的输出。 每个比较器还接收与模拟输入信号进行比较的各自的比较器参考信号，并且输出表示模拟输入信号和各个比较器参考信号之间的比较的数字值。 在一个实施例中，动态参考控制器动态地向多个比较器输出一个或多个动态参考电压，其中比较器可以接收不同的比较器参考电压以与模拟输入信号进行比较。 因此，动态参考控制器可以提供用于模数转换过程的滑动范围电压窗口，其中输入信号保持在电压窗口内。 在另一个实施例中，使用反馈信号来减小模拟输入信号的电压范围，从而能够减少数量的比较器。

公开(公告)号：US6016112A

公开(公告)日：2000-01-18

申请号：US199937

申请日：1998-11-25

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M3/02 ,  H03M1/06

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for reducing linearity errors in an A/D converter, such as a delta-sigma converter. The linearity errors in the delta-sigma converter are modeled by generating a set of digital signals representative of an inputted sine wave. The set of digital signals are low-pass filtered and subjected to a fast Fourier transform algorithm to generate a frequency domain representation of the sine wave. Thereafter, a net linearity error spectrum is removed from the frequency domain representation and inverse Fourier transform back into the time domain. The filtered set of digital signals are also sorted into subsets of digital signals where each signal in a subset corresponds to a particular output of a delta-sigma modulator contained within the delta-sigma converter. A fast Fourier transform algorithm is applied to each of the filtered subsets of digital signals to generate a frequency domain representation thereof. Specific linearity errors are generated by applying an inverse Fourier transform algorithm to each of the specific linearity error spectrums in the frequency domain representations of the filtered subsets of digital signals. Thereafter, linearity error correction coefficients are generated as a function of the net linearity error and the specific linearity errors. The linearity error correction coefficients are used to generate entries in a look-up table where the entries are adjustable by digital outputs of the delta-sigma modulator. The look-up table is used to correct digital signals outputted by the delta-sigma modulator prior to decimation and digital filter.

摘要翻译： 用于降低A / D转换器（例如Δ-Σ转换器）中的线性误差的系统和方法。 Δ-Σ转换器中的线性误差通过产生代表​​输入的正弦波的一组数字信号来建模。 该组数字信号被低通滤波并经受快速傅立叶变换算法以产生正弦波的频域表示。 此后，将净线性误差谱从频域表示和逆傅里叶变换中移除回时域。 经滤波的数字信号组也被分类为数字信号的子集，其中子集中的每个信号对应于包含在Δ-Σ转换器内的Δ-Σ调制器的特定输出。 快速傅立叶变换算法被应用于数字信号的滤波子集中的每一个以产生其频域表示。 通过对经过滤波的数字信号子集的频域表示中的每个特定线性误差谱应用逆傅里叶变换算法来产生特定的线性误差。 此后，产生线性误差校正系数作为净线性误差和特定线性误差的函数。 线性误差校正系数用于在查询表中生成条目，其中条目可由delta-Σ调制器的数字输出调节。 查找表用于在抽取和数字滤波之前校正由Δ-Σ调制器输出的数字信号。

公开(公告)号：US5781137A

公开(公告)日：1998-07-14

申请号：US771480

申请日：1996-12-23

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： H03M3/02 ,  H03M1/06

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for reducing linearity errors in a delta-sigma converter. The linearity errors in the delta-sigma converter are modeled by generating a set of digital signals representative of an inputted sine wave. The set of digital signals are low-pass filtered and subjected to a fast Fourier transform algorithm to generate a frequency domain representation of the sine wave. Thereafter, a net linearity error spectrum is removed from the frequency domain representation and inverse Fourier transform back into the time domain. The filtered set of digital signals are also sorted into subsets of digital signals where each signal in a subset corresponds to a particular output of a delta-sigma modulator contained within the delta-sigma converter. A fast Fourier transform algorithm is applied to each of the filtered subsets of digital signals to generate a frequency domain representation thereof. Specific linearity errors are generated by applying an inverse Fourier transform algorithm to each of the specific linearity error spectrums in the frequency domain representations of the filtered subsets of digital signals. Thereafter, linearity error correction coefficients are generated as a function of the net linearity error and the specific linearity errors. The linearity error correction coefficients are used to generate entries in a look-up table where the entries are adjustable by digital outputs of the delta-sigma modulator. The look-up table is used to correct digital signals outputted by the delta-sigma modulator prior to decimation and digital filter.

摘要翻译： 用于减小Δ-Σ转换器中的线性误差的系统和方法。 Δ-Σ转换器中的线性误差通过产生代表​​输入的正弦波的一组数字信号来建模。 该组数字信号被低通滤波并经受快速傅立叶变换算法以产生正弦波的频域表示。 此后，将净线性误差谱从频域表示和逆傅里叶变换中移除回时域。 经滤波的数字信号组也被分类为数字信号的子集，其中子集中的每个信号对应于包含在Δ-Σ转换器内的Δ-Σ调制器的特定输出。 快速傅立叶变换算法被应用于数字信号的滤波子集中的每一个以产生其频域表示。 通过对经过滤波的数字信号子集的频域表示中的每个特定线性误差谱应用逆傅里叶变换算法来产生特定的线性误差。 此后，产生线性误差校正系数作为净线性误差和特定线性误差的函数。 线性误差校正系数用于在查询表中生成条目，其中条目可由delta-Σ调制器的数字输出调节。 查找表用于在抽取和数字滤波之前校正由Δ-Σ调制器输出的数字信号。

公开(公告)号：US5734261A

公开(公告)日：1998-03-31

申请号：US740963

申请日：1996-11-05

申请人： Niels Knudsen

发明人： Niels Knudsen

IPC分类号： G05F5/08 ,  H03F1/52

CPC分类号： H03F1/52 ,  H03F2200/261

摘要： An input protection circuit for an instrumentation system which receives an input signal and which is adapted for providing a current and/or voltage limited version of the input signal to a measurement system. The input protection circuit of the present invention utilizes an optocoupler and also includes circuitry which protects the optocoupler from damage if an over-voltage condition is detected. The input protection circuit includes a comparator which is operable to disable or turn off the optocoupler when the current limited version of the input signal exceeds a preset value. The input protection circuit preferably includes a resistor connected in parallel with the optocoupler. which provides an alternative path for the input signal when the optocoupler has been cut off. The present invention thus provides an improved input protection circuit which also protects the optocoupler from damage if an over-voltage condition is detected, but still allows the input signal to be measured during this time.

摘要翻译： 一种用于仪器系统的输入保护电路，其接收输入信号并且适于向测量系统提供输入信号的电流和/或电压限制版本。 本发明的输入保护电路使用光耦合器，并且还包括如果检测到过电压条件则保护光耦合器免受损坏的电路。 输入保护电路包括比较器，当比较器输入信号的当前限制版本超过预设值时，该比较器可操作以禁用或关闭光耦合器。 输入保护电路优选地包括与光耦合器并联连接的电阻器。 当光耦合器被切断时，该输入信号为输入信号提供了替代的路径。 因此，本发明提供了一种改进的输入保护电路，其在检测到过电压状况时也保护光耦合器免受损坏，但仍允许在此期间测量输入信号。

公开(公告)号：US4347401A

公开(公告)日：1982-08-31

申请号：US185919

申请日：1979-10-02

申请人： Niels Knudsen ,  Veikko Orpana ,  Matti Wisur ,  Olov Warulf ,  Hakan Bergqvist ,  Raoul Afzelius

发明人： Niels Knudsen ,  Veikko Orpana ,  Matti Wisur ,  Olov Warulf ,  Hakan Bergqvist ,  Raoul Afzelius

IPC分类号： H01B9/06 ,  H02G5/06

CPC分类号： H02G5/063 ,  H01B9/06 ,  Y10S505/885

摘要： A gas-filled cable having low heat emission and low power loss and being used for the transmission of high-voltage electric current. The cable includes one or more conductors which are axially spaced in position relative to each other by means of supporting insulators inside an enclosing conduit which is filled with an insulating gaseous medium. In such a cable the conduit comprises on one hand a cylindrical metal sheath of plain or low-alloy merchant steel having a carbon content of less than 0.6% and on the other hand a metal shield of non-magnetic material fixed inside the sheath and having a low specific electrical resistivity. The metal shield has a plurality of openings therethrough spaced along its length for forming particle traps.

摘要翻译： PCT No.PCT / SE79 / 00025 Sec。 371日期1979年10月9日第 102（e）1979年10月2日日期PCT提交1979年2月8日PCT公布。 出版物WO79 / 00607 日期1979年8月23日。一种充气电缆，发热量低，功率损耗低，用于传输高压电流。 电缆包括一个或多个导体，其通过在填充有绝缘气体介质的封闭导管内的支撑绝缘体相对于彼此轴向间隔开的位置。 在这种电缆中，导管一方面包括碳含量小于0.6％的普通或低合金商用钢的圆柱形金属护套，另一方面是固定在护套内部的非磁性材料的金属屏蔽，并且具有 低比电阻率。 金属屏蔽件具有沿其长度间隔开的多个开口，用于形成颗粒捕集器。