公开(公告)号：US07450421B2

公开(公告)日：2008-11-11

申请号：US11421871

申请日：2006-06-02

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C16/04

CPC分类号： G11C16/3418

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US20080056001A1

公开(公告)日：2008-03-06

申请号：US11933649

申请日：2007-11-01

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US07310272B1

公开(公告)日：2007-12-18

申请号：US11421884

申请日：2006-06-02

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C16/06 ,  G11C16/04

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US07561473B2

公开(公告)日：2009-07-14

申请号：US11933632

申请日：2007-11-01

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/06

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US20080056000A1

公开(公告)日：2008-03-06

申请号：US11933632

申请日：2007-11-01

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C16/06

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

公开(公告)号：US20070279995A1

公开(公告)日：2007-12-06

申请号：US11421884

申请日：2006-06-02

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C16/04 ,  G11C11/34 ,  G11C16/06

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US20070279994A1

公开(公告)日：2007-12-06

申请号：US11421871

申请日：2006-06-02

申请人： Nima Mokhlesi ,  Yingda Dong

发明人： Nima Mokhlesi ,  Yingda Dong

IPC分类号： G11C11/34

CPC分类号： G11C16/3418

摘要： Errors can occur when reading the threshold voltage of a programmed non-volatile storage element due to at least two mechanisms: (1) capacitive coupling between neighboring floating gates and (2) changing conductivity of the channel area after programming (referred to as back pattern effect). To account for coupling between neighboring floating gates, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. To account for the back pattern effect, a first voltage is used during a verify operation for unselected word lines that have been subjected to a programming operation and a second voltage is used for unselected word lines that have not been subjected to a programming operation. The combination of these two techniques provides for more accurate storage and retrieval of data.

摘要翻译： 由于至少两种机制，读取编程的非易失性存储元件的阈值电压时可能会发生错误：（1）相邻浮动栅极之间的电容耦合和（2）编程后改变通道区域的电导率（称为反向图案 影响）。 为了考虑相邻浮动栅极之间的耦合，对于特定存储器单元的读取处理将为相邻存储器单元提供补偿，以便减少相邻存储器单元对特定存储器单元具有的耦合效应。 为了解决背模式效应，在对已经经过编程操作的未选字线的验证操作期间使用第一电压，并且对未经过编程操作的未选字线使用第二电压。 这两种技术的组合提供了更准确的数据存储和检索。

公开(公告)号：US08472257B2

公开(公告)日：2013-06-25

申请号：US13071170

申请日：2011-03-24

申请人： Yingda Dong ,  Ken Oowada ,  Cynthia Hsu

发明人： Yingda Dong ,  Ken Oowada ,  Cynthia Hsu

IPC分类号： G11C16/10

CPC分类号： G11C11/5628 ,  G11C16/04 ,  G11C16/10 ,  G11C16/3468

摘要： A group of memory cells of a nonvolatile memory is programmed in parallel in a programming pass with a minimum of verify steps from an erased state to respective target states by a staircase waveform. The memory states are demarcated by a set of increasing demarcation threshold values (V1, . . . , VN). Initially in the programming pass, the memory cells are verified relative to a test reference threshold value. This test reference threshold has a value offset past a designate demarcation threshold value Vi among the set by a predetermined margin. The overshoot of each memory cell when programmed past Vi, to be more or less than the margin can be determined. Accordingly, memory cells found to have an overshoot more than the margin are counteracted by having their programming rate slowed down in a subsequent portion of the programming pass so as to maintain a tighter threshold distribution.

摘要翻译： 非易失性存储器的一组存储器单元在编程通道中并行编程，其中通过阶梯波形具有从擦除状态到各个目标状态的最小验证步骤。 存储器状态由一组增加的分界阈值（V1，...，VN）划分。 最初在编程过程中，相对于测试参考阈值验证存储器单元。 该测试参考阈值具有超过设定中的指定分界阈值Vi的值偏移预定余量。 可以确定当经过Vi编程时每个存储单元的过冲大于或小于余量。 因此，发现超过裕度的超调的存储器单元的编程速率在编程通过的后续部分中变慢，以便保持更严格的阈值分布而被抵消。

公开(公告)号：US20120314499A1

公开(公告)日：2012-12-13

申请号：US13155323

申请日：2011-06-07

申请人： Jiahui Yuan ,  Yingda Dong ,  Charles Kwong

发明人： Jiahui Yuan ,  Yingda Dong ,  Charles Kwong

IPC分类号： G11C16/26 ,  G11C16/06 ,  G11C16/04

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3454 ,  G11C16/349 ,  G11C29/021 ,  G11C29/028

摘要： A first read pass voltage is determined and optimized for cycled memory. One or more starting read pass voltages are determined for one or more dies. The system dynamically calculates a current read pass voltage based on the number of program/erase erase cycles, the first read pass voltage and the respective starting read pass voltage. Data is read from one or more non-volatile storage elements using the calculated current read pass voltage.

摘要翻译： 确定并优化循环存储器的第一个读通过电压。 为一个或多个管芯确定一个或多个启动读通过电压。 该系统基于编程/擦除擦除周期的数量，第一读取通过电压和相应的启动读取通过电压来动态地计算当前的读取通过电压。 使用计算出的电流读通过电压从一个或多个非易失性存储元件读取数据。

公开(公告)号：US08144511B2

公开(公告)日：2012-03-27

申请号：US12544113

申请日：2009-08-19

申请人： Yingda Dong ,  Tien-chien Kuo ,  Gerrit Jan Hemink

发明人： Yingda Dong ,  Tien-chien Kuo ,  Gerrit Jan Hemink

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/14 ,  G11C16/16 ,  G11C16/30 ,  G11C16/3418 ,  G11C2211/5641

摘要： Techniques are disclosed herein for programming memory arrays to achieve high program/erase cycle endurance. In some aspects, only selected word lines (WL) are programmed with other WLs remaining unprogrammed. As an example, only the even word lines are programmed with the odd WLs left unprogrammed. After all of the even word lines are programmed and the data block is to be programmed with new data, the block is erased. Later, only the odd word lines are programmed. The data may be transferred to a block that stores multiple bit per memory cell prior to the erase. In one aspect, the data is programmed in a checkerboard pattern with some memory cells programmed and others left unprogrammed. Later, after erasing the data, the previously unprogrammed part of the checkerboard pattern is programmed with remaining cells unprogrammed.