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    Adaptive transform encoder for digital image signal in recording/reproducing apparatus
    5.
    发明授权
    Adaptive transform encoder for digital image signal in recording/reproducing apparatus 失效
    用于记录/再现装置中的数字图像信号的自适应变换编码器

    公开(公告)号：US5047852A

    公开(公告)日：1991-09-10

    申请号：US375727

    申请日：1989-07-05

    申请人： Hiroyuki Hanyu ,  Nobukazu Doi ,  Seiichi Mita ,  Morishi Izumita ,  Yoshizumi Eto

    发明人： Hiroyuki Hanyu ,  Nobukazu Doi ,  Seiichi Mita ,  Morishi Izumita ,  Yoshizumi Eto

    IPC分类号： G06T9/00 ,  H03M7/30 ,  H03M7/38 ,  H04N1/41 ,  H04N5/926 ,  H04N19/00 ,  H04N19/115 ,  H04N19/126 ,  H04N19/134 ,  H04N19/136 ,  H04N19/14 ,  H04N19/176 ,  H04N19/186 ,  H04N19/189 ,  H04N19/196 ,  H04N19/46 ,  H04N19/59 ,  H04N19/60 ,  H04N19/625 ,  H04N19/70 ,  H04N19/85

    CPC分类号： H04N5/9264 ,  H04N19/115 ,  H04N19/124 ,  H04N19/14 ,  H04N19/149 ,  H04N19/154 ,  H04N19/176 ,  H04N19/18 ,  H04N19/184 ,  H04N19/60 ,  H04N19/13 ,  H04N19/146 ,  H04N19/91

    摘要： An adaptive transform encoder can keep a recording rate of a digital signal at a constant level. It comprises a unit for orthogonal-transforming one block of digital input signal, a unit for calculating an activity index of the orthogonal-transformed block, a unit for comparing the activity index of the block with a predetermined reference, a unit for classifying the block to a standard bit class having a predetermined number of bits when the activity index of the block is equal to the reference, classifying the block to a low bit class having a smaller number of bits than the predetermined number of bits of the standard bit class when the activity index of the block is smaller than the reference, and classifying the block to a high bit class having a larger number of bits than the predetermined number of bits of the standard bit class when the activity index is larger than the reference, a quantization unit for quantizing the input signal of the block with the number of bits designated by the bit class, a unit for selecting the block of the low bit class from the quantized blocks, an allocation unit for adding to the selected block of the low bit class the data having more bits than the number of bits of the standard bit class of the block of the quantized high bit class, and an encoder unit for encoding the quantized block signal.

    摘要翻译： 自适应变换编码器可以将数字信号的记录速率保持在恒定水平。 它包括用于正交变换一个数字输入信号块的单元，用于计算正交变换块的活动索引的单元，用于将块的活动性指数与预定参考进行比较的单元，用于对块进行分类的单元 当块的活动索引等于参考时，将具有预定比特数的标准比特类分类为具有比标准比特类的预定比特数少的比特数比特的低比特级， 该块的活动指数小于参考值，并且当活动指数大于参考值时，将块分类为具有比标准比特类的预定比特数大的比特数的比特数较大的高比特级，量化 用于通过由位类别指定的比特数量量化块的输入信号的单元，用于从量化块中选择低比特等级的块的单元 分配单元，用于向所选择的低位类别的块添加比量化高位类别的块的标准位类别的位数多的位的数据，以及用于对量化块信号进行编码的编码器单元 。

    Demodulation apparatus
    6.
    发明授权
    Demodulation apparatus 失效
    解调装置

    公开(公告)号：US4983965A

    公开(公告)日：1991-01-08

    申请号：US444845

    申请日：1989-12-04

    申请人： Nobukazu Doi ,  Morishi Izumita ,  Seiichi Mita ,  Yoshizumi Eto

    发明人： Nobukazu Doi ,  Morishi Izumita ,  Seiichi Mita ,  Yoshizumi Eto

    IPC分类号： G11B20/14 ,  H03M5/14

    CPC分类号： H03M5/14

    摘要： An original digital signal is converted into either a Miller-squared code signal or a Miller code signal, and undergoes serial-to-parallel conversion to produce n-phase signals (where n is desired to be a positive even number). N-phase virtual demodulated signals are simultaneously generated at clock timing having a period equivalent to 1/n times the period of the transmission clock. Out of the n-phase virtual demodulated signals, n/2 phases are selected to undergo parallel-to-serial conversion, the original digital signal being thus obtained.

    摘要翻译： 原始数字信号被转换成米勒平方码信号或米勒码信号，并进行串并转换以产生n相信号（其中n希望为正偶数）。 在具有相当于传输时钟的周期的1 / n倍的周期的时钟定时处同时产生N相虚拟解调信号。 在n相虚拟解调信号中，选择n / 2相进行并行到串行转换，从而获得原始数字信号。

    Apparatus for recording/reproducing digital video signals in both a standard mode and a long playing mode
    9.
    发明授权
    Apparatus for recording/reproducing digital video signals in both a standard mode and a long playing mode 失效
    用于在标准模式和长播放模式下记录/再现数字视频信号的装置

    公开(公告)号：US4963992A

    公开(公告)日：1990-10-16

    申请号：US301462

    申请日：1989-01-26

    申请人： Nobukazu Doi ,  Yoshizumi Eto ,  Morishi Izumita ,  Seiichi Mita ,  Kazuyuki Takeshita

    发明人： Nobukazu Doi ,  Yoshizumi Eto ,  Morishi Izumita ,  Seiichi Mita ,  Kazuyuki Takeshita

    IPC分类号： H04N5/92 ,  G11B20/18 ,  H04N5/926 ,  H04N9/797

    CPC分类号： H04N9/797 ,  H04N5/926

    摘要： An apparatus for recording an reproducing a digital video signal is disclosed which includes n sampling circuits each for performing a sub-Nyquist sampling operation for the digital video signal in such a manner that the amount of data is reduced to one-n-th of an original amount (where n is a positive integer) and a pixel sampled by the sub-Nyquist sampling operation is not sampled by the remaining sampling circuits, recording/reproducing means for recording and reproducing information at all or part of pixels which are sampled by the n sampling circuits and a device for reconstructing the digital video signal from reproduced information at pixels with the aid of a synthesizing technique or interpolation technique.

    摘要翻译： 公开了一种用于记录再现数字视频信号的装置，其包括n个采样电路，每个采样电路用于对数字视频信号执行子奈奎斯特采样操作，使得数据量减少到数字视频信号的1 / 原始量（其中n是正整数）和通过亚奈奎斯特采样操作采样的像素不被剩余的采样电路采样，用于在全部或部分像素记录和再现信息的记录/再现装置 n个采样电路和用于通过合成技术或插值技术在像素处从再现信息重构数字视频信号的装置。