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公开(公告)号：US07220308B2
公开(公告)日：2007-05-22
申请号：US10828555
申请日：2004-04-21
IPC分类号： C30B15/20
摘要： To suppress a fluctuation in resistivity around a target value to thereby stably manufacture high resistivity silicon single crystals having almost the same resistivity values in a manufacturing method wherein a silicon raw material is molten to manufacture a high resistivity silicon single crystal in the range of from 100 to 2000 Ω cm with a CZ method. In a case where poly-silicon produced with a Siemens method using trichlorosilane as raw material is used as the silicon raw material, an impurity concentration in the silicon raw material is selected so as to be controlled in the range of from −5 to 50 ppta method in terms of (a donor concentration—an acceptor concentration) and the selected poly-silicon is used. In a case of a MCZ method, the poly-silicon is selected in the range of from −25 to 20 ppta and the selected poly-silicon is used. Instead of the raw material, poly-silicon produced with a Siemens method using monosilane as raw material is used. Alternatively, a silicon crystal manufactured with a CZ method or a MCZ method using poly-silicon raw material is used.
摘要翻译： 为了抑制围绕目标值的电阻率的波动，从而在将硅原料熔融以制造范围为100的高电阻率硅单晶的制造方法中稳定地制造具有几乎相同的电阻率值的高电阻率硅单晶 到2000欧米加厘米与CZ方法。 在使用以三氯硅烷为原料的西门子方法制造的多晶硅作为硅原料的情况下，选择硅原料中的杂质浓度以控制在-5〜50ppta的范围内 使用（供体浓度 - 受体浓度）和选择的多晶硅的方法。 在MCZ方法的情况下，多晶硅的选择范围为-25〜20ppta，使用所选择的多晶硅。 使用以硅烷为原料的西门子法生产的多晶硅代替原料。 或者，使用以CZ法制造的硅晶体或使用多晶硅原料的MCZ法。
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公开(公告)号：US20050000410A1
公开(公告)日：2005-01-06
申请号：US10828555
申请日：2004-04-21
摘要： To suppress a fluctuation in resistivity around a target value to thereby stably manufacture high resistivity silicon single crystals having almost the same resistivity values in a manufacturing method wherein a silicon raw material is molten to manufacture a high resistivity silicon single crystal in the range of from 100 to 2000 Ω cm with a CZ method. In a case where poly-silicon produced with a Siemens method using trichlorosilane as raw material is used as the silicon raw material, an impurity concentration in the silicon raw material is selected so as to be controlled in the range of from −5 to 50 ppta method in terms of (a donor concentration—an acceptor concentration) and the selected poly-silicon is used. In a case of a MCZ method, the poly-silicon is selected in the range of from −25 to 20 ppta and the selected poly-silicon is used. Instead of the raw material, poly-silicon produced with a Siemens method using monosilane as raw material is used. Alternatively, a silicon crystal manufactured with a CZ method or a MCZ method using poly-silicon raw material is used.
摘要翻译： 为了抑制围绕目标值的电阻率的波动，从而在将硅原料熔融以制造范围为100的高电阻率硅单晶的制造方法中稳定地制造具有几乎相同的电阻率值的高电阻率硅单晶 到2000欧米加厘米与CZ方法。 在使用以三氯硅烷为原料的西门子方法制造的多晶硅作为硅原料的情况下，选择硅原料中的杂质浓度以控制在-5〜50ppta的范围内 使用（供体浓度 - 受体浓度）和选择的多晶硅的方法。 在MCZ方法的情况下，多晶硅的选择范围为-25〜20ppta，使用所选择的多晶硅。 使用以硅烷为原料的西门子法生产的多晶硅代替原料。 或者，使用以CZ法制造的硅晶体或使用多晶硅原料的MCZ法。
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公开(公告)号：US20050253221A1
公开(公告)日：2005-11-17
申请号：US10512405
申请日：2003-04-16
IPC分类号： H01L21/26 , H01L21/322 , H01L29/167 , H01L21/22
CPC分类号： H01L21/3225
摘要： A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.
摘要翻译： 制造高电阻硅晶片，其中吸收能力，机械强度和经济效率优异，并且在用于形成电路的热处理中有效地防止了氧热供体的产生，该电路在 设备制造商。 在非氧化性气氛中，在500〜900℃下进行形成氧沉淀核的热处理5小时以上，在950〜1050℃下进行氧沉淀的热处理10小时 以上，电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片，氧浓度为14×10 17原子/ cm 3（以下） ASTM F-121,1979）或更高，碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理，将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3（ASTM F-121,1979）或更小。 因此，提供了电阻率为100Ωm或更大的高电阻，低氧和高强度硅晶片，并且形成具有0.2μm大小的氧沉淀物（BMD），以便具有高密度的1×10 4/4以上。
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公开(公告)号：US07397110B2
公开(公告)日：2008-07-08
申请号：US10512405
申请日：2003-04-16
IPC分类号： H01L29/36 , H01L21/322
CPC分类号： H01L21/3225
摘要： A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.
摘要翻译： 制造高电阻硅晶片，其中吸收能力，机械强度和经济效率优异，并且在用于形成电路的热处理中有效地防止了氧热供体的产生，该电路在 设备制造商。 在非氧化性气氛中，在500〜900℃下进行形成氧沉淀核的热处理5小时以上，在950〜1050℃下进行氧沉淀的热处理10小时 以上，电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片，氧浓度为14×10 17原子/ cm 3（以下） ASTM F-121,1979）或更高，碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理，将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3（ASTM F-121,1979）或更小。 因此，提供了电阻率为100Ωm或更大的高电阻，低氧和高强度硅晶片，并且形成具有0.2μm大小的氧沉淀物（BMD），以便具有高密度的1×10 4/4以上。
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公开(公告)号：US20050127477A1
公开(公告)日：2005-06-16
申请号：US10964728
申请日：2004-10-15
IPC分类号： H01L21/322 , H01L21/324 , H01L29/00
CPC分类号： H01L21/3225
摘要： A high resistivity p type silicon wafer with a resistivity of 100 Ωcm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 μm from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.
摘要翻译： 在形成表面的附近，具有电阻率为100Ωm或更大的高电阻率p型硅晶片，其中当进行器件制造工艺中的热处理时，由于热供体而导致的ap / n型转换层 一代位于与表面形成接触或超过8μm深度的任何器件有源区和耗尽层区域的深度上，以及其制造方法。 高电阻率硅晶片可以引起供体的影响而不降低晶片中的可溶性氧浓度，由此即使在器件制造工艺中进行各种热处理，也可以制造诸如CMOS的器件，其提供优异的特性。 该晶片作为高频集成电路器件的基板具有广泛的应用。
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公开(公告)号：US07226571B2
公开(公告)日：2007-06-05
申请号：US10964728
申请日：2004-10-15
IPC分类号： C30B15/20
CPC分类号： H01L21/3225
摘要： A high resistivity p type silicon wafer with a resistivity of 100 Ωcm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 μm from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.
摘要翻译： 在形成表面的附近，具有电阻率为100Ωm或更大的高电阻率p型硅晶片，其中当进行器件制造工艺中的热处理时，由于热供体而导致的ap / n型转换层 一代位于与表面形成接触或超过8μm深度的任何器件有源区和耗尽层区域的深度上，以及其制造方法。 高电阻率硅晶片可以引起供体的影响而不降低晶片中的可溶性氧浓度，由此即使在器件制造工艺中进行各种热处理，也可以制造诸如CMOS的器件，其提供优异的特性。 该晶片作为高频集成电路器件的基板具有广泛的应用。
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公开(公告)号：US20050250349A1
公开(公告)日：2005-11-10
申请号：US10519837
申请日：2003-06-30
IPC分类号： C30B29/06 , C30B33/00 , H01L21/322 , H01L21/762 , H01L21/00 , H01L21/336 , H01L29/15 , H01L31/0312
CPC分类号： C30B33/00 , C30B29/06 , H01L21/3225 , H01L21/76243 , Y10T428/21
摘要： A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 Ωcm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.
摘要翻译： 制造高电阻硅晶片，其中吸收能力和经济效率优异，并且在用于形成电路的热处理中有效地防止氧热供体被产生，该电路将在器件的一侧 制造商。 为了实现上述，在比电阻率为100Ω·以上且碳浓度为5×10 6的碳掺杂高电阻和高氧硅晶片上进行1100℃以上的高温热处理 15至15×10 17原子/ cm 3，使得剩余的氧浓度为6.5×10 17原子/ cm 3， SUP> 3以上（旧ASTM）。 作为这种高温处理，在晶片表面上形成DZ层的OD处理，用于消除表面层上的COP的高温退火处理，在SIMOX晶片中形成BOX层的高温热处理 可以使用制造工艺等。
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公开(公告)号：US07316745B2
公开(公告)日：2008-01-08
申请号：US10519837
申请日：2003-06-30
IPC分类号： C30B29/06 , H01L21/322 , H01L21/324
CPC分类号： C30B33/00 , C30B29/06 , H01L21/3225 , H01L21/76243 , Y10T428/21
摘要： A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 Ωcm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.
摘要翻译： 制造高电阻硅晶片，其中吸收能力和经济效率优异，并且在用于形成电路的热处理中有效地防止氧热供体被产生，该电路将在器件的一侧 制造商。 为了实现上述，在比电阻率为100Ω·以上且碳浓度为5×10 6的碳掺杂高电阻和高氧硅晶片上进行1100℃以上的高温热处理 15至15×10 17原子/ cm 3，使得剩余的氧浓度为6.5×10 17原子/ cm 3， SUP> 3以上（旧ASTM）。 作为这种高温处理，在晶片表面上形成DZ层的OD处理，用于消除表面层上的COP的高温退火处理，在SIMOX晶片中形成BOX层的高温热处理 可以使用制造工艺等。
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公开(公告)号：US07273647B2
公开(公告)日：2007-09-25
申请号：US10809712
申请日：2004-03-26
IPC分类号： B32B9/04
CPC分类号： C30B33/00 , C30B29/06 , H01L21/3225 , Y10T428/21
摘要： A silicon annealed wafer having a sufficient thick layer free from COP defects on the surface, and a sufficient uniform BMD density in the inside can be produced by annealing either a base material wafer having nitrogen at a concentration of less than 1×1014 atoms/cm3, COP defects having a size of 0.1 μm or less in the highest frequency of occurrence and no COP defects having a size of 0.2 μm or more, oxygen precipitates at a density of 1×104 counts/cm2 or more, and BMDs (oxygen precipitates), where the ratio of the maximum to the minimum of the BMD density in the radial direction of the wafer is 3 or less, or a base material wafer grown at specific average temperature gradients within specific temperature ranges and specific cooling times for a single crystal at a nitrogen concentration of less than 1×1014 atoms/cm3, employing the Czochralski method. Moreover, a silicon epitaxial wafer having very small defects and a uniform BMD distribution in the inside can be formed by growing an epitaxial layer on the surface of either the first type base material wafer or the second type base material wafer. Both the silicon annealed wafer and the silicon epitaxial wafer greatly reduce the rate of producing defective devices, thereby enabling the device productivity to be enhanced.
摘要翻译： 具有在表面上没有COP缺陷的足够厚的厚层的硅退火晶片，并且可以通过退火具有小于1×10 14的浓度的氮的基材晶片来制造内部的足够均匀的BMD密度， / SUP>原子/ cm 3，出现发生频率的大小为0.1μm以下的COP缺陷，没有大小为0.2μm以上的COP缺陷，氧浓度为 1×10 4个/ cm 2以上的BMD（氧沉淀物），其中晶片的径向BMD密度的最大值与最小值之比 在特定温度范围内以特定平均温度梯度生长的基材晶片和氮浓度小于1×10 14原子/ cm 2的单晶的比冷却时间为3以下， 3，采用Czochralski法。 此外，可以通过在第一类型基材晶片或第二类型基材晶片的表面上生长外延层来形成具有非常小缺陷和均匀的BMD分布的硅外延晶片。 硅退火晶片和硅外延晶片都大大降低了制造缺陷器件的速率，从而能够提高器件的生产率。
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10.发明授权公开(公告)号：US06423137B1
公开(公告)日：2002-07-23
申请号：US09403626
申请日：1999-11-05
申请人： Nobumitsu Takase
发明人： Nobumitsu Takase
IPC分类号： C30B1530
CPC分类号： C30B15/02 , Y10T117/1056
摘要： The present invention aims to prevent solidification of a melt in a feeding pipe without providing heating means such as heater or heat keeping means such as heat insulating material on outer periphery of the feeding pipe when the melt is supplied from an auxiliary crucible into a main crucible via the feeding pipe by overflow. At the center of the auxiliary crucible 1 made of quartz, a pipe 1a for feeding the melt from the auxiliary crucible 1 to the main crucible 11 by overflow is formed. When the raw material in the auxiliary crucible is melted, it is designed in such manner that the raw material is not continuously supplied to the auxiliary crucible but it is supplied in such quantity that the melt overflows intermittently into an opening on the upper end of the pipe 1a from the auxiliary crucible 1 into the main crucible 11.
摘要翻译： 本发明的目的是防止在将熔体从辅助坩埚供应到主坩埚中时，在馈送管的外周上不设置加热装置或诸如隔热材料的保温装置等加热装置， 通过供水管溢流。 在由石英制成的辅助坩埚1的中心处，形成有用于通过溢流将熔融物从辅助坩埚1供给主坩埚11的管1a。 当辅助坩埚中的原料熔化时，其原料被设计成使得原料不被连续地供应到辅助坩埚，而是以这样的量供应，使得熔体间歇地溢出到 管1a从辅助坩埚1进入主坩埚11。
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