公开(公告)号：US20180054585A1

公开(公告)日：2018-02-22

申请号：US15559706

申请日：2016-03-02

Applicant: Nokia Technologies Oy

Inventor： Martti VOUTILAINEN ,  Sami KALLIOINEN

IPC: H04N5/3745 ,  H01L31/0352

CPC classification number: H04N5/37455 ,  H01L27/142 ,  H01L27/14643 ,  H01L31/035218 ,  H01L31/112 ,  H04N5/374 ,  H04N5/378

Abstract: An apparatus, including a quantum dot graphene field effect transistor configured to operate such that photons incident thereon cause electron-hole pairs to be formed; a connector element connected to the back gate of the transistor; a switch element as an output switch to provide an output for a current flowing through the transistor. The transistor is configured to be back gate biased via the connector element connected to the back gate such that the electrons or the holes formed are trapped in an at least one quantum dot and respectively the holes or the electrons migrate to the channel of the transistor. A drain to source voltage connected to the transistor causes a current proportional to the charge of the holes or electrons trapped at the quantum dots by the electrons or holes to flow in the channel.

公开(公告)号：US20210217745A1

公开(公告)日：2021-07-15

申请号：US16093217

申请日：2017-03-15

Applicant: Nokia Technologies Oy

Inventor： Mark ALLEN ,  Martti VOUTILAINEN ,  Sami KALLIOINEN

IPC: H01L27/02 ,  H03K17/16

Abstract: An apparatus including an array of field-effect transistors, each field-effect transistor including a channel, source and drain electrodes, and a gate electrode configured to enable the flow of electrical current to be varied, the gate electrode separated from the channel by a dielectric material configured to inhibit a flow of electrical current between the channel and gate electrode, wherein the gate electrode of each field-effect transistor is connected in parallel to the gate electrodes of the other field-effect transistors in the array, and wherein a respective two-terminal current-limiting component is coupled to each gate electrode such that, in the event that a defect in the dielectric material of a particular field-effect transistor allows a leakage current to flow between the channel and gate electrode of that field-effect transistor, the respective two-terminal current-limiting component limits the magnitude of the leakage current.

公开(公告)号：US20180090622A1

公开(公告)日：2018-03-29

申请号：US15560278

申请日：2016-03-03

Applicant: Nokia Technologies Oy

Inventor： Katri POHJONEN ,  Sami KALLIOINEN ,  Markku ROUVALA

IPC: H01L29/786 ,  H01L21/683 ,  H01L29/16 ,  H01L29/66 ,  H01L29/778 ,  H01L51/05

CPC classification number: H01L29/78636 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L27/0694 ,  H01L29/1606 ,  H01L29/66045 ,  H01L29/66742 ,  H01L29/778 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78696 ,  H01L31/0203 ,  H01L31/028 ,  H01L31/035209 ,  H01L31/112 ,  H01L51/0558 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/13072 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15311 ,  Y02E10/547

Abstract: A method and apparatus wherein the method comprises: providing at least one electrode within a semiconductor layer wherein the semiconductor layer is provided on a first side of a wafer; thinning the wafer to produce a thinned wafer; providing graphene on a second side of the thinned wafer; attaching the semiconductor layer to an electrical interface on the first side of the thinned wafer; and providing at least one electrical connection from the graphene to the electrical interface so as to form a transistor comprising the at least one electrode and the graphene.

公开(公告)号：US20190063966A1

公开(公告)日：2019-02-28

申请号：US15770630

申请日：2016-10-21

Applicant: Nokia Technologies Oy

Inventor： Helena POHJONEN ,  Sami KALLIOINEN ,  Pekka KORPINEN

IPC: G01D18/00 ,  H01L27/146

Abstract: An apparatus and method, the apparatus including a plurality of sensors; readout circuitry configured to read information from each of the plurality of sensors; and wherein the apparatus has identifier information and calibration information stored with the identifier information and the apparatus is configured to be coupled to at least one other apparatus to form an array of apparatus.

公开(公告)号：US20190051681A1

公开(公告)日：2019-02-14

申请号：US16080236

申请日：2017-02-20

Applicant: Nokia Technologies Oy

Inventor： Sami KALLIOINEN ,  Martti VOUTILAINEN

IPC: H01L27/144 ,  G01J1/16 ,  G01J1/44

Abstract: An apparatus comprising at least one pair of a first inner and second outer photodetector, each photodetector comprising a channel member, respective source and drain electrodes configured to enable a flow of electrical current through the channel member between the source and drain electrodes, and a plurality of quantum dots configured to generate electron-hole pairs on exposure to incident electromagnetic radiation to produce a detectable change in the electrical current flowing through the channel member. The first inner and second outer photodetectors are configured to generate electron-hole pairs which produce an increase and decrease in electrical current through the channel members. The first inner and the second outer photodetectors share a common channel member, which is partitioned by one or more of the respective source and drain electrodes respectively extending in two dimensions such that the first inner photodetector is defined within the second outer photodetector.