Semiconductor-based radiation-detector element
    1.
    发明授权
    Semiconductor-based radiation-detector element 失效
    基于半导体的辐射探测器元件

    公开(公告)号:US5019886A

    公开(公告)日:1991-05-28

    申请号:US282612

    申请日:1988-12-12

    摘要: A semiconductor-based radiation-detector element particularly adapted to neutron detection, and the method for making the same, in which a high sensitivity single-crystal semiconductor substrate has diffused therein at-least-one region of .sup.3 He gas, which remains resident therein, whereby, upon application of an inverse bias to the junction in the semiconductor substrate, the colliding of incident neutrons with the resident .sup.3 He gas results in a reaction which produces hole-electron pairs in the depletion layer within the semiconductor, those hole-electron pairs producing output electrical pulses which appear at the output terminals of the detector for utilization by detection and measuring apparatus connected to the semiconductor-based radiation-detector element.

    摘要翻译: 特别适用于中子检测的基于半导体的辐射检测元件及其制造方法,其中高灵敏度单晶半导体衬底在其中保留在其中的3He气体的至少一个区域内扩散, 由此,当对半导体衬底中的接合部施加反向偏压时,入射中子与驻留的3He气体的碰撞导致在半导体内的耗尽层中产生空穴 - 电子对的反应,产生的空穴 - 电子对 输出出现在检测器的输出端的电脉冲,以便与连接到基于半导体的辐射检测器元件的检测和测量装置一起利用。

    Semiconductor-based radiation-detector element
    2.
    发明授权
    Semiconductor-based radiation-detector element 失效
    基于半导体的辐射探测器元件

    公开(公告)号:US5156979A

    公开(公告)日:1992-10-20

    申请号:US664825

    申请日:1991-05-07

    IPC分类号: G01T3/08 H01L31/115 H01L31/18

    摘要: A semiconductor-based radiation-detector element particularly adapted to neutron detection, and the method for making the same, in which a high sensitivity single-crystal semiconductor substrate has diffused therein at-least-one region of .sup.3 He gas, which remain resident therein, whereby, upon application of an inverse bias to the junction in the semiconductor substrate, the colliding of incident neutrons with the resident .sup.3 He gas results in a reaction which produces hole-electron pairs in the depletion layer within the semiconductor, those hole-electron pairs producing output electrical pulses which appear at the output terminals of the detector for utilization by detection and measuring apparatus connected to the semiconductor-based radiation-detector element.

    摘要翻译: 特别适用于中子检测的基于半导体的辐射检测元件及其制造方法,其中高灵敏度单晶半导体衬底在其中保留在其中的3He气体的至少一个区域扩散, 由此,当对半导体衬底中的接合部施加反向偏压时,入射中子与驻留的3He气体的碰撞导致在半导体内的耗尽层中产生空穴 - 电子对的反应,产生的空穴 - 电子对 输出出现在检测器的输出端的电脉冲,以便与连接到基于半导体的辐射检测器元件的检测和测量装置一起利用。

    Semiconductor radiation detector
    3.
    发明授权
    Semiconductor radiation detector 失效
    半导体辐射探测器

    公开(公告)号:US4689649A

    公开(公告)日:1987-08-25

    申请号:US771622

    申请日:1985-09-03

    摘要: A semiconductor device for detecting incident gamma-radiation wherein the output from the device is relatively independent of the energy of the incident radiation. The device includes a semiconductor substrate having a depletion layer formed therein by an applied voltage. The depletion layer is shaped such that it includes a plurality of elongated projections within a plane parallel to the surface of the substrate. The minimum distance between the edge of the substrate and the outer extent of the depletion layer is substantially equal to the average range of mobility of secondary electrons created by the gamma rays having the highest energy of the gamma-rays to be detected. The device further includes means for counting the current pulses generated in the depletion layer by secondary electrons created by the incident gamma rays.

    摘要翻译: 一种用于检测入射伽马辐射的半导体器件,其中来自器件的输出相对独立于入射辐射的能量。 该器件包括其中通过施加的电压在其中形成耗尽层的半导体衬底。 耗尽层被成形为使得其在平行于衬底的表面的平面内包括多个细长突起。 衬底的边缘与耗尽层的外部范围之间的最小距离基本上等于由待检测的伽马射线能量最高的γ射线产生的二次电子的平均移动范围。 该装置还包括用于通过由入射的伽马射线产生的二次电子来计数在耗尽层中产生的电流脉冲的装置。

    Semiconductor memory
    4.
    发明授权
    Semiconductor memory 有权
    半导体存储器

    公开(公告)号:US08014191B2

    公开(公告)日:2011-09-06

    申请号:US12352838

    申请日:2009-01-13

    IPC分类号: G11C11/00

    CPC分类号: G11C5/14 G11C11/412

    摘要: In a semiconductor memory including word lines and bit lines arranged in a matrix and a plurality of memory cells provided at intersections of the word lines and the bit lines, a bit line precharge circuit is provided for controlling the potential of a low-data holding power supply coupled to memory cells provided on a corresponding one of the bit lines. In a write operation, the bit line precharge circuit controls the potential of a low-data holding power supply of a memory cell corresponding to a selected bit line to be higher than the potential of a low-data holding power supply of a memory cell corresponding to an unselected bit line.

    摘要翻译: 在包括排列成矩阵的字线和位线的半导体存储器以及设置在字线和位线的交叉处的多个存储单元的情况下,提供位线预充电电路,用于控制低数据保持电力的电位 电源耦合到提供在对应的一个位线上的存储器单元。 在写入操作中,位线预充电电路控制与所选位线对应的存储单元的低数据保持电源的电位高于对应于存储单元的低数据保持电源的电位 到未选择的位线。

    Memory circuit
    6.
    发明申请

    公开(公告)号:US20060184856A1

    公开(公告)日:2006-08-17

    申请号:US11339479

    申请日:2006-01-26

    申请人: Toshikazu Suzuki

    发明人: Toshikazu Suzuki

    IPC分类号: H03M13/00

    CPC分类号: G11C7/24 G06F11/1044

    摘要: A memory circuit includes a data storage section for storing a plurality of data sets and a plurality of redundant data sets, which are used for error correction for the data sets; and an error correction section for performing at least error detection for the data sets in the data storage section by using the redundant data sets when the memory circuit is not accessed from outside for data input or output, and outputting at least result of the error detection as an error detection signal. When the memory circuit is accessed so as to output a designated one of the stored data sets, the designated data set is outputted without being subjected to the error detection by the error correction section.

    Memory testing apparatus
    10.
    发明授权
    Memory testing apparatus 失效
    记忆测试仪

    公开(公告)号:US5946250A

    公开(公告)日:1999-08-31

    申请号:US252634

    申请日:1999-02-19

    申请人: Toshikazu Suzuki

    发明人: Toshikazu Suzuki

    CPC分类号: G11C29/56 G01R31/31935

    摘要: There is provided a memory testing apparatus having, for a high speed device testing, a failure data display controller for memory test including a display apparatus for displaying positions of failure memory cells based on failure data obtained by testing of a memory.After the test is completed, the failure data stored in a failure memory for storing failure data are transferred to a failure buffer memory for temporarily storing failure data provided in the failure data display controller. The failure data stored in the failure buffer memory are converted and transferred to the display apparatus. During the time period when the next device is being tested, the failure cell positions of the previously tested device are displayed on the display apparatus.

    摘要翻译: 提供了一种用于高速设备测试的存储器测试设备,用于存储器测试的故障数据显示控制器,包括用于基于通过测试存储器获得的故障数据来显示故障存储单元的位置的显示设备。 测试完成后,存储在用于存储故障数据的故障存储器中的故障数据被传送到故障缓冲存储器,用于临时存储故障数据显示控制器中提供的故障数据。 存储在故障缓冲存储器中的故障数据被转换并传送到显示装置。 在下一个设备被测试的时间段期间,先前测试的设备的故障单元位置被显示在显示设备上。