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    SEMICONDUCTOR DEVICE COMPRISING eFUSES OF ENHANCED PROGRAMMING EFFICIENCY
    3.
    发明申请
    SEMICONDUCTOR DEVICE COMPRISING eFUSES OF ENHANCED PROGRAMMING EFFICIENCY 有权
    包含增强编程效率的图像的半导体器件

    公开(公告)号：US20100107403A1

    公开(公告)日：2010-05-06

    申请号：US12579654

    申请日：2009-10-15

    申请人： Oliver Aubel ,  Jens Poppe ,  Andreas Kurz ,  Roman Boschke

    发明人： Oliver Aubel ,  Jens Poppe ,  Andreas Kurz ,  Roman Boschke

    IPC分类号： H01H69/02

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10T29/49107 ,  H01L2924/00

    摘要： In sophisticated integrated circuits, an electronic fuse may be formed such that an increased sensitivity to electromigration may be accomplished by including at least one region of increased current density. This may be accomplished by forming a corresponding fuse region as a non-linear configuration, wherein at corresponding connection portions of linear segments, the desired enhanced current crowding may occur during the application of the programming voltage. Hence, increased reliability and more space-efficient layout of the electronic fuses may be accomplished.

    摘要翻译： 在复杂的集成电路中，可以形成电子熔断器，使得可以通过包括增加的电流密度的至少一个区域来实现对电迁移的增加的灵敏度。 这可以通过形成相应的熔丝区域作为非线性配置来实现，其中在对应的线性段的连接部分期间，在施加编程电压期间可能发生所需的增强的电流拥挤。 因此，可以实现电子熔断器的增加的可靠性和更节省空间的布局。

    Unified test structure for stress migration tests
    6.
    发明授权
    Unified test structure for stress migration tests 有权
    压力迁移测试的统一测试结构

    公开(公告)号：US08174010B2

    公开(公告)日：2012-05-08

    申请号：US11949993

    申请日：2007-12-04

    申请人： Frank Feustel ,  Pascal Limbecker ,  Oliver Aubel

    发明人： Frank Feustel ,  Pascal Limbecker ,  Oliver Aubel

    IPC分类号： H01L23/58 ,  H01L29/10

    CPC分类号： H01L22/34 ,  G01R31/2858 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A unified test structure which is applicable for all levels of a semiconductor device including a current path chain having a first half chain and a second half chain, wherein each half chain comprises lower metallization segments, upper metallization segments, an insulating layer between the lower metallization segments and the upper metallization segments, and connection segments. Each of the connection segments is electrically connected to a contact region of one of the lower metallization segments and to a contact region of one of the upper metallization segments to thereby electrically connect the respective lower metallization segment and the respective upper metallization segment, and the first half chain and the second half chain are of different configuration.

    摘要翻译： 一种统一的测试结构，其适用于包括具有第一半链和第二半链的电流路径链的半导体器件的所有级别，其中每个半链包括下金属化段，上金属化段，下金属化层之间的绝缘层 段和上部金属化段，以及连接段。 每个连接段电连接到下部金属化段之一的接触区域和上部金属化段之一的接触区域，从而电连接相应的下部金属化段和相应的上部金属化段，并且第一 半链和第二半链具有不同的配置。

    UNIFIED TEST STRUCTURE FOR STRESS MIGRATION TESTS
    7.
    发明申请
    UNIFIED TEST STRUCTURE FOR STRESS MIGRATION TESTS 有权
    用于应变移动试验的统一测试结构

    公开(公告)号：US20080265247A1

    公开(公告)日：2008-10-30

    申请号：US11949993

    申请日：2007-12-04

    申请人： Frank Feustel ,  Pascal Limbecker ,  Oliver Aubel

    发明人： Frank Feustel ,  Pascal Limbecker ,  Oliver Aubel

    IPC分类号： H01L23/58

    CPC分类号： H01L22/34 ,  G01R31/2858 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A unified test structure which is applicable for all levels of a semiconductor device including a current path chain having a first half chain and a second half chain, wherein each half chain comprises lower metallization segments, upper metallization segments, an insulating layer between the lower metallization segments and the upper metallization segments, and connection segments. Each of the connection segments is electrically connected to a contact region of one of the lower metallization segments and to a contact region of one of the upper metallization segments to thereby electrically connect the respective lower metallization segment and the respective upper metallization segment, and the first half chain and the second half chain are of different configuration.

    摘要翻译： 一种统一的测试结构，其适用于包括具有第一半链和第二半链的电流路径链的半导体器件的所有级别，其中每个半链包括下金属化段，上金属化段，下金属化层之间的绝缘层 段和上部金属化段，以及连接段。 每个连接段电连接到下部金属化段之一的接触区域和上部金属化段之一的接触区域，从而电连接相应的下部金属化段和相应的上部金属化段，并且第一 半链和第二半链具有不同的配置。

    BUILT-IN COMPLIANCE IN TEST STRUCTURES FOR LEAKAGE AND DIELECTRIC BREAKDOWN OF DIELECTRIC MATERIALS OF METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES
    9.
    发明申请
    BUILT-IN COMPLIANCE IN TEST STRUCTURES FOR LEAKAGE AND DIELECTRIC BREAKDOWN OF DIELECTRIC MATERIALS OF METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES 有权
    用于半导体器件金属化系统的介电材料的漏电和电介质破坏的测试结构中的内置符合性

    公开(公告)号：US20100134125A1

    公开(公告)日：2010-06-03

    申请号：US12620664

    申请日：2009-11-18

    申请人： Oliver Aubel ,  Frank Feustel ,  Torsten Schmidt

    发明人： Oliver Aubel ,  Frank Feustel ,  Torsten Schmidt

    IPC分类号： G01R31/26

    CPC分类号： H01L22/34

    摘要： In a test structure for determining dielectric breakdown events of a metallization system of semiconductor devices, a built-in compliance functionality may allow reliable switching off of the test voltage prior to causing high leakage currents, which may conventionally result in significant damage. Consequently, further failure analysis may be possible after the occurrence of a dielectric breakdown event.

    摘要翻译： 在用于确定半导体器件的金属化系统的绝缘击穿事件的测试结构中，内置的兼容性功能可以允许在引起高泄漏电流之前可靠地关断测试电压，这可能常常导致显着的损坏。 因此，在电介质击穿事件发生之后，进一步的故障分析可能是可能的。

    PERFORMANCE ENHANCEMENT IN METALLIZATION SYSTEMS OF MICROSTRUCTURE DEVICES BY INCORPORATING GRAIN SIZE INCREASING METAL FEATURES
    10.
    发明申请
    PERFORMANCE ENHANCEMENT IN METALLIZATION SYSTEMS OF MICROSTRUCTURE DEVICES BY INCORPORATING GRAIN SIZE INCREASING METAL FEATURES 审中-公开
    通过增加颗粒尺寸增加金属特征的微结构设备金属化系统的性能提升

    公开(公告)号：US20100133700A1

    公开(公告)日：2010-06-03

    申请号：US12624517

    申请日：2009-11-24

    申请人： Thomas Werner ,  Oliver Aubel ,  Frank Feustel

    发明人： Thomas Werner ,  Oliver Aubel ,  Frank Feustel

    IPC分类号： H01L23/522 ,  H01L21/768

    CPC分类号： H01L23/528 ,  H01L21/76813 ,  H01L21/76816 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a sophisticated metallization system, enhanced electromigration behavior may be accomplished by incorporating electromigration barriers into metal lines after a given distance, which may be accomplished by providing an increased width in order to obtain an enhanced average grain size in the intermediate metal regions of increased lateral width. Consequently, the electromigration induced material diffusion may encounter an overall increased grain size along the entire depth of the metal lines, thereby resulting in a significantly reduced electromigration effect and thus enhanced reliability of the critical metal lines.

    摘要翻译： 在复杂的金属化系统中，增强的电迁移行为可以通过在给定距离之后将电迁移屏障并入金属线中来实现，这可以通过提供增加的宽度来实现，以便在增加的侧向的中间金属区域中获得增强的平均晶粒尺寸 宽度。 因此，电迁移诱导的材料扩散可能沿着金属线的整个深度遇到总体增加的晶粒尺寸，从而导致显着降低的电迁移效应，从而提高关键金属线的可靠性。