公开(公告)号：US08447246B2

公开(公告)日：2013-05-21

申请号：US13207786

申请日：2011-08-11

申请人： Omid Oliaei ,  David Newman ,  Benjamin Gilsdorf ,  Patrick L. Rakers

发明人： Omid Oliaei ,  David Newman ,  Benjamin Gilsdorf ,  Patrick L. Rakers

IPC分类号： H04B1/04

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0023 ,  H04B1/0057 ,  H04B1/0483

摘要： In accordance with some embodiments of the present disclosure, a multi-band transmitter comprises a plurality of band paths with each band path configured for a different frequency range. Each band path comprises a modulator configured to modulate a data signal onto a carrier signal associated with the frequency range of the band path to generate a radio frequency (RF) signal associated with the band path and frequency range of the band path. Each band path also comprises a step-down balun that includes an input coil configured to receive the RF signal from the modulator. Each band path further comprises a tuner configured to tune the input coil to the frequency range of the band path. The tuner is also configured to compensate for off-state conduction of switches of the tuner to reduce non-linear tuning effects of the balun associated with the off-state conduction.

摘要翻译： 根据本公开的一些实施例，多频带发射机包括多个频带路径，每个频带路径被配置用于不同的频率范围。 每个频带路径包括被配置为将数据信号调制到与频带路径的频率范围相关联的载波信号上以产生与频带路径的频带路径和频带范围相关联的射频（RF）信号的调制器。 每个频带路径还包括降压平衡 - 不平衡变压器，其包括被配置为从调制器接收RF信号的输入线圈。 每个频带路径还包括被配置为将输入线圈调谐到频带路径的频率范围的调谐器。 调谐器还被配置为补偿调谐器的开关的截止状态传导，以减少与断开状态传导相关联的平衡 - 不平衡变换器的非线性调谐效应。

公开(公告)号：US20130039438A1

公开(公告)日：2013-02-14

申请号：US13207786

申请日：2011-08-11

申请人： Omid Oliaei ,  David Newman ,  Benjamin Gilsdorf ,  Patrick L. Rakers

发明人： Omid Oliaei ,  David Newman ,  Benjamin Gilsdorf ,  Patrick L. Rakers

IPC分类号： H04L27/00

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0023 ,  H04B1/0057 ,  H04B1/0483

摘要： In accordance with some embodiments of the present disclosure, a multi-band transmitter comprises a plurality of band paths with each band path configured for a different frequency range. Each band path comprises a modulator configured to modulate a data signal onto a carrier signal associated with the frequency range of the band path to generate a radio frequency (RF) signal associated with the band path and frequency range of the band path. Each band path also comprises a step-down balun that includes an input coil configured to receive the RF signal from the modulator. Each band path further comprises a tuner configured to tune the input coil to the frequency range of the band path. The tuner is also configured to compensate for off-state conduction of switches of the tuner to reduce non-linear tuning effects of the balun associated with the off-state conduction.

摘要翻译： 根据本公开的一些实施例，多频带发射机包括多个频带路径，每个频带路径被配置用于不同的频率范围。 每个频带路径包括被配置为将数据信号调制到与频带路径的频率范围相关联的载波信号上以产生与频带路径的频带路径和频带范围相关联的射频（RF）信号的调制器。 每个频带路径还包括降压平衡 - 不平衡变压器，其包括被配置为从调制器接收RF信号的输入线圈。 每个频带路径还包括被配置为将输入线圈调谐到频带路径的频率范围的调谐器。 调谐器还被配置为补偿调谐器的开关的截止状态传导，以减少与断开状态传导相关联的平衡 - 不平衡变换器的非线性调谐效应。

公开(公告)号：US08698664B2

公开(公告)日：2014-04-15

申请号：US13363884

申请日：2012-02-01

申请人： Omid Oliaei ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Patrick L. Rakers

IPC分类号： H03M1/12

CPC分类号： H03M3/45 ,  H03M3/454

摘要： In accordance with embodiments of the present disclosure, a continuous-time incremental analog-to-digital converter (ADC) may include a plurality of resettable integrators and a feed-in gain element. Each integrator may be configured to convert a sum of signals received at its input to a signal indicative of an integral over time of the sum of signals. The plurality of integrators may include a first-stage integrator configured to receive at its input the baseband signal and a final-stage integrator configured to produce at its output a final-stage analog signal. The plurality of integrators may be arranged in a cascade configuration such that an output of each of the plurality of integrators other than the final-stage integrator is coupled to the input of a subsequent integrator. The feed-in gain element may be coupled between the input of the first-stage integrator and the input of another integrator of the plurality of integrators.

摘要翻译： 根据本公开的实施例，连续时间增量模数转换器（ADC）可以包括多个可复位积分器和馈入增益元件。 每个积分器可以被配置为将在其输入处接收的信号的和转换成指示信号总和的积分的信号。 多个积分器可以包括被配置为在其输入处接收基带信号的第一级积分器和被配置为在其输出端产生最终级模拟信号的最终级积分器。 多个积分器可以被布置成级联配置，使得除了最终级积分器之外的多个积分器中的每一个的输出耦合到后续积分器的输入。 馈入增益元件可以耦合在第一级积分器的输入端和多个积分器的另一个积分器的输入端之间。

公开(公告)号：US06697001B1

公开(公告)日：2004-02-24

申请号：US10324684

申请日：2002-12-19

申请人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

IPC分类号： H03M302

CPC分类号： H03M3/356 ,  H03M3/43 ,  H03M3/456

摘要： Systems and methods are described for a continuous-time sigma-delta modulator with discrete time common-mode feedback. The method includes calculating an integrator input signal as a difference between an input signal and a modulation feedback signal, continuous time integrating the integrator input signal to produce an integrator output signal having a common mode voltage, determining the common mode voltage of the integrator output signal using a discrete-time process, determining an integrator feedback signal as a function of the common-mode voltage and feeding back the feedback signal to the integrator in order to maintain the common mode voltage at a substantially constant value, sampling and quantizing the integrator output signal to produce a sigma-delta modulated output signal and converting the sigma-delta modulated output signal from a digital signal to an analog signal, to produce the modulation feedback signal.

摘要翻译： 对具有离散时间共模反馈的连续时间Σ-Δ调制器描述了系统和方法。 该方法包括：计算积分器输入信号作为输入信号和调制反馈信号之间的差值，连续时间积分积分器输入信号以产生具有共模电压的积分器输出信号，确定积分器输出信号的共模电压 使用离散时间过程，确定作为共模电压的函数的积分器反馈信号并将反馈信号反馈到积分器，以便将共模电压保持在基本恒定的值，对积分器输出进行采样和量化 信号以产生Σ-Δ调制输出信号，并将Σ-Δ调制输出信号从数字信号转换成模拟信号，以产生调制反馈信号。

公开(公告)号：US06693572B1

公开(公告)日：2004-02-17

申请号：US10358055

申请日：2003-02-04

申请人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

IPC分类号： H03M300

CPC分类号： H03M3/382 ,  H03M3/43 ,  H03M3/456

摘要： Systems and methods are described for a digital tuning scheme for continuous-time sigma-delta modulation. The method includes integrating a voltage from a voltage source using a discrete-time integrator to produce a discrete-time integrator output, continuous-time integrating a current from a controllable current source to produce a continuous-time integrator output, quantizing the difference between the continuous-time integrator output and the discrete-time integrator output to produce a quantizer output, controlling a polarity of the controllable current source with the quantizer output, counting the quantizer output to produce a feedback signal, and tuning the controllable current source as a function of the feedback signal.

摘要翻译： 描述了用于连续时间Σ-Δ调制的数字调谐方案的系统和方法。 该方法包括使用离散时间积分器积分来自电压源的电压以产生离散时间积分器输出，将来自可控电流源的电流连续时间积分以产生连续时间积分器输出，量化 连续时间积分器输出和离散时间积分器输出以产生量化器输出，通过量化器输出来控制可控电流源的极性，对量化器输出进行计数以产生反馈信号，以及调节可控电流源作为一个功能 的反馈信号。

公开(公告)号：US20130194116A1

公开(公告)日：2013-08-01

申请号：US13363884

申请日：2012-02-01

申请人： Omid Oliaei ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Patrick L. Rakers

IPC分类号： H03M1/12 ,  H03M1/10 ,  H03M1/00

CPC分类号： H03M3/45 ,  H03M3/454

摘要： In accordance with embodiments of the present disclosure, a continuous-time incremental analog-to-digital converter (ADC) may include a plurality of resettable integrators and a feed-in gain element. Each integrator may be configured to convert a sum of signals received at its input to a signal indicative of an integral over time of the sum of signals. The plurality of integrators may include a first-stage integrator configured to receive at its input the baseband signal and a final-stage integrator configured to produce at its output a final-stage analog signal. The plurality of integrators may be arranged in a cascade configuration such that an output of each of the plurality of integrators other than the final-stage integrator is coupled to the input of a subsequent integrator. The feed-in gain element may be coupled between the input of the first-stage integrator and the input of another integrator of the plurality of integrators.

摘要翻译： 根据本公开的实施例，连续时间增量模数转换器（ADC）可以包括多个可复位积分器和馈入增益元件。 每个积分器可以被配置为将在其输入处接收的信号的和转换成指示信号总和的积分的信号。 多个积分器可以包括被配置为在其输入处接收基带信号的第一级积分器和被配置为在其输出端产生最终级模拟信号的最终级积分器。 多个积分器可以被布置成级联配置，使得除了最终级积分器之外的多个积分器中的每一个的输出耦合到后续积分器的输入。 馈入增益元件可以耦合在第一级积分器的输入端和多个积分器的另一个积分器的输入端之间。

公开(公告)号：US08463206B2

公开(公告)日：2013-06-11

申请号：US13207672

申请日：2011-08-11

申请人： Chuanzhao Yu ,  Omid Oliaei ,  David Newman ,  Michael L. Gomez

发明人： Chuanzhao Yu ,  Omid Oliaei ,  David Newman ,  Michael L. Gomez

IPC分类号： H04B1/04

CPC分类号： H03F3/193

摘要： In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.

摘要翻译： 根据本公开的一些实施例，电路包括被配置为接收电流模式输入信号的输入节点和包括通信地耦合到输入节点的输入设备的输入级。 输入设备被配置为在输入节点处接收输入信号。 电路还包括通信地耦合到输入级并被配置为为输入设备提供偏置电流的偏置电路。 偏置电路还被配置为通过与输入节点相关联的反馈回路从输入信号中去除偏置电流的至少一部分，使得输入信号由输入装置接收，其中偏置电流的至少一部分被去除 。 电路还包括通信地耦合到输入级并被配置为基于输入信号输出电流模式输出信号的输出级。

公开(公告)号：US08451046B2

公开(公告)日：2013-05-28

申请号：US12882306

申请日：2010-09-15

申请人： Omid Oliaei ,  David Newman

发明人： Omid Oliaei ,  David Newman

IPC分类号： H03K17/687

CPC分类号： H03K17/165 ,  H03K2217/0036

摘要： In accordance with embodiments of the present disclosure, a circuit may include a transmission switch and a dummy switch coupled at its output to the output of the transmission switch. The transmission switch may be configured to be selectively enabled and disabled based on a control signal received at a gate of the transmission switch. The transmission switch may be further configured to receive a first polarity of a differential signal at its input and pass the first polarity of the differential signal to its output when enabled. The dummy switch may be configured to be disabled and to receive a second polarity of the differential signal at its input, the second polarity of opposite polarity of the first polarity.

摘要翻译： 根据本公开的实施例，电路可以包括传输开关和在其输出处耦合到传输开关的输出的虚拟开关。 传输开关可以被配置为基于在传输交换机的门处接收的控制信号来选择性地使能和禁用。 传输开关还可以被配置为在其输入处接收差分信号的第一极性，并且当使能时将差分信号的第一极性传递到其输出。 伪开关可以被配置为禁用，并且在其输入处接收差分信号的第二极性，第二极性与第一极性相反的极性。

公开(公告)号：US20130039434A1

公开(公告)日：2013-02-14

申请号：US13207746

申请日：2011-08-11

申请人： Omid Oliaei ,  Mark Alan Kirschenmann ,  David Newman

发明人： Omid Oliaei ,  Mark Alan Kirschenmann ,  David Newman

IPC分类号： H04L27/00

CPC分类号： H04B1/0475 ,  H04L25/0266 ,  H04L25/0272 ,  H04L25/0278 ,  H04L27/0008 ,  H04L27/206

摘要： In accordance with some embodiments of the present disclosure, a transmitting path comprises a digital to analog converter (DAC) configured to receive digital data signals and convert the digital data signals into analog data signals. The transmitting path further comprises a first transmission protocol path and a second transmission protocol path configured to receive a first data signal and second data signal, respectively, from the DAC. The first data signal is associated with a first transmission protocol and the second data signal is associated with the second transmission protocol. The transmitting path additionally comprises a mixer coupled to the first and second transmission protocol paths and configured to receive at least one of the first data signal and the second data signal and modulate at least one of the first data signal and the second data signal onto a carrier signal to generate a radio frequency (RF) signal.

摘要翻译： 根据本公开的一些实施例，发送路径包括被配置为接收数字数据信号并将数字数据信号转换成模拟数据信号的数模转换器（DAC）。 发送路径还包括分别从DAC接收第一数据信号和第二数据信号的第一传输协议路径和第二传输协议路径。 第一数据信号与第一传输协议相关联，第二数据信号与第二传输协议相关联。 传输路径另外包括耦合到第一和第二传输协议路径并被配置为接收第一数据信号和第二数据信号中的至少一个的混频器，并且将第一数据信号和第二数据信号中的至少一个调制到 载波信号以产生射频（RF）信号。

公开(公告)号：US08693961B2

公开(公告)日：2014-04-08

申请号：US13207712

申请日：2011-08-11

申请人： Omid Oliaei ,  David Newman ,  Mark Kirschenmann

发明人： Omid Oliaei ,  David Newman ,  Mark Kirschenmann

IPC分类号： H04B1/04

CPC分类号： H03H7/25 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/165 ,  H03F1/0222 ,  H03F1/0266 ,  H03F1/0277 ,  H03F1/223 ,  H03F3/211 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/45744 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/06 ,  H03F2200/111 ,  H03F2200/211 ,  H03F2200/429 ,  H03F2200/432 ,  H03F2200/504 ,  H03F2200/511 ,  H03F2200/534 ,  H03F2200/91 ,  H03F2203/45054 ,  H03F2203/45212 ,  H03F2203/7209 ,  H03F2203/7215 ,  H03F2203/7236

摘要： In accordance with some embodiments of the present disclosure, a circuit comprises a balun configured to receive a radio frequency (RF) signal at a first input port and a second input port of an input coil. The balun is further configured to output the RF signal at an output coil communicatively coupled to the input coil. The circuit also comprises a supply voltage selector circuit coupled to the input coil and configured to adjust a bias voltage at the input coil according to a power level of the RF signal received at the input coil.

摘要翻译： 根据本公开的一些实施例，电路包括被配置为在输入线圈的第一输入端口和第二输入端口处接收射频（RF）信号的平衡 - 不平衡变换器。 平衡 - 不平衡变换器还被配置为在通信地耦合到输入线圈的输出线圈处输出RF信号。 电路还包括电源电压选择器电路，其耦合到输入线圈并且被配置为根据在输入线圈处接收的RF信号的功率电平来调节输入线圈处的偏置电压。