公开(公告)号：US07115956B2

公开(公告)日：2006-10-03

申请号：US10430443

申请日：2003-05-07

申请人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

发明人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

IPC分类号： H01L29/76

CPC分类号： G02F1/136286 ,  H01L21/76838 ,  H01L21/76895 ,  H01L27/124 ,  H01L29/78621

摘要： In the manufacture of a semiconductor device, there are provided a method that enables reduction in the number of manufacturing steps thereof and a structure for realizing the method, to thereby realize improvement in yield and reduction in manufacturing cost. Wirings (source wiring, drain wiring, and the like), which are respectively formed in a row direction and a column direction on an element substrate, are formed of the same conductive film. In this case, one of the respective wirings in the row direction and the column direction is discontinuously formed at a portion where the wirings intersect with each other, and an insulating film is formed on the wirings. Thereafter, a connection wiring for connecting discontinuous wirings is formed of the same film as that for forming an electrode provided on the insulating film. As a result, a continuous wiring is formed.

摘要翻译： 在半导体装置的制造中，提供了能够减少其制造步骤数量的方法和实现该方法的结构，从而实现产量的提高和制造成本的降低。 在元件基板上分别沿行方向和列方向形成的布线（源极配线，漏极配线等）由相同的导电膜形成。 在这种情况下，在布线方向和列方向上的各个布线中的一个在布线彼此交叉的部分处不连续地形成，并且在布线上形成绝缘膜。 此后，用于连接不连续布线的连接布线由与形成在绝缘膜上的电极形成相同的膜形成。 结果，形成连续布线。

公开(公告)号：US07453101B2

公开(公告)日：2008-11-18

申请号：US11028536

申请日：2005-01-05

申请人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

发明人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

IPC分类号： H01L21/04

CPC分类号： G02F1/136286 ,  H01L21/76838 ,  H01L21/76895 ,  H01L27/124 ,  H01L29/78621

摘要： In the manufacture of a semiconductor device, there are provided a method that enables reduction in the number of manufacturing steps thereof and a structure for realizing the method, to thereby realize improvement in yield and reduction in manufacturing cost. Wirings (source wiring, drain wiring, and the like), which are respectively formed in a row direction and a column direction on an element substrate, are formed of the same conductive film. In this case, one of the respective wirings in the row direction and the column direction is discontinuously formed at a portion where the wirings intersect with each other, and an insulating film is formed on the wirings. Thereafter, a connection wiring for connecting discontinuous wirings is formed of the same film as that for forming an electrode provided on the insulating film. As a result, a continuous wiring is formed.

摘要翻译： 在半导体装置的制造中，提供了能够减少其制造步骤数量的方法和实现该方法的结构，从而实现产量的提高和制造成本的降低。 在元件基板上分别沿行方向和列方向形成的布线（源极配线，漏极配线等）由相同的导电膜形成。 在这种情况下，在布线方向和列方向上的各个布线中的一个在布线彼此交叉的部分处不连续地形成，并且在布线上形成绝缘膜。 此后，用于连接不连续布线的连接布线由与形成在绝缘膜上的电极形成相同的膜形成。 结果，形成连续布线。

公开(公告)号：US20050116227A1

公开(公告)日：2005-06-02

申请号：US11028536

申请日：2005-01-05

申请人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

发明人： Osamu Nakamura ,  Hideaki Kuwabara ,  Noriko Shibata

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/768 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H01L29/10

CPC分类号： G02F1/136286 ,  H01L21/76838 ,  H01L21/76895 ,  H01L27/124 ,  H01L29/78621

摘要： In the manufacture of a semiconductor device, there are provided a method that enables reduction in the number of manufacturing steps thereof and a structure for realizing the method, to thereby realize improvement in yield and reduction in manufacturing cost. Wirings (source wiring, drain wiring, and the like), which are respectively formed in a row direction and a column direction on an element substrate, are formed of the same conductive film. In this case, one of the respective wirings in the row direction and the column direction is discontinuously formed at a portion where the wirings intersect with each other, and an insulating film is formed on the wirings. Thereafter, a connection wiring for connecting discontinuous wirings is formed of the same film as that for forming an electrode provided on the insulating film. As a result, a continuous wiring is formed.

摘要翻译： 在半导体装置的制造中，提供了能够减少其制造步骤数量的方法和实现该方法的结构，从而实现产量的提高和制造成本的降低。 在元件基板上分别沿行方向和列方向形成的布线（源极配线，漏极配线等）由相同的导电膜形成。 在这种情况下，在布线方向和列方向上的各个布线中的一个在布线彼此交叉的部分处不连续地形成，并且在布线上形成绝缘膜。 此后，用于连接不连续布线的连接布线由与形成在绝缘膜上的电极形成相同的膜形成。 结果，形成连续布线。

公开(公告)号：US07575965B2

公开(公告)日：2009-08-18

申请号：US10579443

申请日：2004-11-29

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L21/84

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate.In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在制作显示大面积的显示器时，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US07141822B2

公开(公告)日：2006-11-28

申请号：US10066542

申请日：2002-02-05

申请人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

发明人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

IPC分类号： H01L29/786

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  Y10S257/913

摘要： The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.

摘要翻译： TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。 本发明提供了减少电特性偏差的TFT及其制造方法。 本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。 如图所示。 如图1所示，后气体元件至少包含在通道区域的上层中。

公开(公告)号：US20070096096A1

公开(公告)日：2007-05-03

申请号：US10579443

申请日：2004-11-29

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate. In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在制作显示大面积的显示器时，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US20070037309A1

公开(公告)日：2007-02-15

申请号：US11582445

申请日：2006-10-18

申请人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

发明人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

IPC分类号： H01L21/00

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  Y10S257/913

摘要： The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.

摘要翻译： TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。 本发明提供了减少电特性偏差的TFT及其制造方法。 本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。 如图所示。 如图1所示，后气体元件至少包含在通道区域的上层中。

公开(公告)号：US07897968B2

公开(公告)日：2011-03-01

申请号：US12504840

申请日：2009-07-17

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L29/04

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate.In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在产生显示大面积的显示器中，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US10257884B2

公开(公告)日：2019-04-09

申请号：US12207112

申请日：2008-09-09

申请人： Hideaki Kuwabara

发明人： Hideaki Kuwabara

IPC分类号： H05B1/02

摘要： A device that warms a surface of a living body required to be warmed at an appropriate timing at any place indoors and outdoors or the sea without causing low temperature burns. A sheet having a heat generating function including a circuit capable of receiving electric power without contact over a sheet containing plastic or a fibrous body, a heat generating circuit, and a circuit that controls the temperature of the heat generating circuit is manufactured. The user with the sheet transmits the radio signal from the transmission device outdoors or indoors to heat the heat generating circuit on the sheet and the heat can be conducted to the skin of the user. Temperature can be automatically adjusted by the circuit for controlling the temperature of the heat generating circuit.

公开(公告)号：US09057924B2

公开(公告)日：2015-06-16

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/67

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.