公开(公告)号：US07141822B2

公开(公告)日：2006-11-28

申请号：US10066542

申请日：2002-02-05

申请人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

发明人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

IPC分类号： H01L29/786

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  Y10S257/913

摘要： The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.

摘要翻译： TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。 本发明提供了减少电特性偏差的TFT及其制造方法。 本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。 如图所示。 如图1所示，后气体元件至少包含在通道区域的上层中。

公开(公告)号：US20070037309A1

公开(公告)日：2007-02-15

申请号：US11582445

申请日：2006-10-18

申请人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

发明人： Osamu Nakamura ,  Masayuki Kajiwara ,  Junichi Koezuka ,  Shunpei Yamazaki ,  Hideaki Kuwabara

IPC分类号： H01L21/00

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78621 ,  Y10S257/913

摘要： The TFT electric characteristic is ready to be influenced by the channel region in the neighborhood of an interface between a semiconductor and a gate insulating film. The present invention provides TFTs reduced in electric characteristic deviations and a method for manufacturing the same. The invention forms a region or layer containing an inactive element, or rear gas element, in the channel region. As shown in FIG. 1, a rear gas element is contained at least in an upper layer of the channel region.

摘要翻译： TFT电气特性准备好受到半导体和栅极绝缘膜之间的界面附近的沟道区的影响。 本发明提供了减少电特性偏差的TFT及其制造方法。 本发明在通道区域中形成含有非活性元件或后气体元件的区域或层。 如图所示。 如图1所示，后气体元件至少包含在通道区域的上层中。

公开(公告)号：US07575965B2

公开(公告)日：2009-08-18

申请号：US10579443

申请日：2004-11-29

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L21/84

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate.In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在制作显示大面积的显示器时，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US20070096096A1

公开(公告)日：2007-05-03

申请号：US10579443

申请日：2004-11-29

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate. In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在制作显示大面积的显示器时，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US07897968B2

公开(公告)日：2011-03-01

申请号：US12504840

申请日：2009-07-17

申请人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

发明人： Hideaki Kuwabara ,  Shunpei Yamazaki ,  Shinji Maekawa ,  Osamu Nakamura

IPC分类号： H01L29/04

CPC分类号： H01L21/288 ,  G02F1/136286 ,  G09G3/3208 ,  G09G2310/0275 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/66765 ,  Y02P80/30

摘要： It is conceivable that the problem that a signal is delayed by resistor of a wiring in producing a display which displays large area becomes remarkable. The present invention provides a manufacturing process using a droplet discharge method suitable for a large-sized substrate.In the present invention, after forming a base layer 11 (or base pretreatment) which enhances adhesiveness over a substrate in advance and forming an insulating film, a mask having a desired pattern shape is formed, and a desired depression is formed by using the mask. A metal material is filled in the depression having a mask 13 and a sidewall made from an insulating film by a droplet discharge method to form an embedded wiring (a gate electrode, a capacitor wiring, lead wiring or the like. Afterwards, it is flattened by a planarization processing, for example, a press or a CMP processing.

摘要翻译： 可以想到，在产生显示大面积的显示器中，由布线的电阻器延迟信号的问题变得显着。 本发明提供一种使用适合于大尺寸基板的液滴喷射方法的制造方法。 在本发明中，在形成预先形成基板上的粘合性的基底层11（或基底预处理）之后，形成绝缘膜的情况下，形成具有期望的图案形状的掩模，通过使用掩模 。 通过液滴喷射法将金属材料填充在具有掩模13和由绝缘膜制成的侧壁的凹部中，以形成嵌入布线（栅电极，电容器布线，引线布线等），然后将其平坦化 通过平坦化处理，例如压制或CMP处理。

公开(公告)号：US09176353B2

公开(公告)日：2015-11-03

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/67

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  H01L21/67207 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US08648343B2

公开(公告)日：2014-02-11

申请号：US12839519

申请日：2010-07-20

申请人： Shunpei Yamazaki ,  Junichiro Sakata ,  Hiroyuki Miyake ,  Hideaki Kuwabara ,  Ikuko Kawamata

发明人： Shunpei Yamazaki ,  Junichiro Sakata ,  Hiroyuki Miyake ,  Hideaki Kuwabara ,  Ikuko Kawamata

IPC分类号： H01L27/12

CPC分类号： H01L27/1225 ,  H01L27/124

摘要： An object is to increase the aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using a metal and a channel layer is formed using an oxide semiconductor, and a driver circuit wiring formed using a metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode and a drain electrode are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor, and a display portion wiring formed using an oxide conductor. The thin film transistors provided in the semiconductor device are formed with a resist mask formed using a multi-tone mask.

摘要翻译： 目的是提高半导体器件的开口率。 半导体器件包括驱动器电路部分和在同一衬底上的显示部分（也称为像素部分）。 驱动器电路部分包括用于驱动电路的沟道蚀刻薄膜晶体管，其中使用金属形成源电极和漏电极，并且使用氧化物半导体形成沟道层，以及使用 金属。 显示部分包括用于像素的沟道保护薄膜晶体管，其中使用氧化物导体形成源电极和漏电极，并且使用氧化物半导体形成半导体层，以及使用氧化物导体形成的显示部分布线 。 设置在半导体器件中的薄膜晶体管形成有使用多色调掩模形成的抗蚀剂掩模。

公开(公告)号：US08552423B2

公开(公告)日：2013-10-08

申请号：US12835903

申请日：2010-07-14

申请人： Shunpei Yamazaki ,  Junichiro Sakata ,  Hiroyuki Miyake ,  Hideaki Kuwabara ,  Tatsuya Takahashi

发明人： Shunpei Yamazaki ,  Junichiro Sakata ,  Hiroyuki Miyake ,  Hideaki Kuwabara ,  Tatsuya Takahashi

IPC分类号： H01L29/10

CPC分类号： H01L27/1225 ,  G02F1/1368 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L29/45 ,  H01L29/78645

摘要： An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.

摘要翻译： 半导体器件的开口率提高。 驱动电路和像素设置在一个基板上，驱动电路中的第一薄膜晶体管和像素中的第二薄膜晶体管均包括栅极电极层，栅电极层上的栅极绝缘层，氧化物 栅极绝缘层上的半导体层，氧化物半导体层上的源极和漏极层以及与栅极绝缘层，氧化物半导体层以及源极和漏极上的部分氧化物半导体层接触的氧化物绝缘层 层。 栅极电极层，栅极绝缘层，氧化物半导体层，源极和漏极电极层以及第二薄膜晶体管的氧化物绝缘层各自具有透光性。

公开(公告)号：US08421135B2

公开(公告)日：2013-04-16

申请号：US12323724

申请日：2008-11-26

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hideaki Kuwabara ,  Saishi Fujikawa

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hideaki Kuwabara ,  Saishi Fujikawa

IPC分类号： H01L31/062

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  G02F1/13458 ,  H01L27/124 ,  H01L27/156 ,  H01L29/6675 ,  H01L29/66765

摘要： In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.

公开(公告)号：US08350469B2

公开(公告)日：2013-01-08

申请号：US13280632

申请日：2011-10-25

申请人： Shunpei Yamazaki ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Hideaki Kuwabara

IPC分类号： H01L51/00

CPC分类号： H01L51/529 ,  H01L51/0042 ,  H01L51/005 ,  H01L51/0062 ,  H01L51/007

摘要： When a light emitting element is actuated to allow the light emission, the generation of Joule heat occurs, leading to the decomposition or crystallization of an organic compound to cause the degradation of the light emitting device. Therefore, a light emitting element of the present invention is provided for effecting removing or decreasing the generation of heat. In the present invention, between two electrodes, layers having organic compounds and carbon-based thin films are alternatively laminated one after another for stepping down the driving voltage in the light emitting element using the tunnel effect. In addition, a carbon-based thin film is placed on a film containing an organic compound, so that it prevents the electric field from being locally concentrated and also prevents the generation of short-circuit between the anode and the cathode.

摘要翻译： 当致动发光元件以允许发光时，发生焦耳热的产生，导致有机化合物的分解或结晶，导致发光器件的劣化。 因此，提供本发明的发光元件用于实现除去或减少热的产生。 在本发明中，在两个电极之间，交替层叠具有有机化合物的层和碳基薄膜，以使用隧道效应降低发光元件中的驱动电压。 此外，将碳基薄膜放置在含有有机化合物的膜上，防止电场局部浓缩，并防止阳极与阴极之间产生短路。