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公开(公告)号:US3650019A
公开(公告)日:1972-03-21
申请号:US3650019D
申请日:1969-12-29
Applicant: PHILIPS CORP
Inventor: ROBINSON DAVID PHYTHIAN
IPC: H01L21/00 , H01L21/265 , H01L21/331 , H01L21/76 , H01L29/00 , H01L29/73 , H01L29/78 , B01J17/00 , H01G13/00
CPC classification number: H01L29/7831 , H01L21/00 , H01L29/00 , Y10S438/945
Abstract: A method of implanting ions in a semiconductor body in which a thin conductive layer is applied on the surface parts or surface adjacent parts at which the ion beam is to be directed. The ions penetrate the thin layer which maintains the surface parts or surface adjacent parts, including metal electrode layers when present, at a common potential. By suitable connection of the thin layer charging of said parts during implantation can be prevented. Subsequent to implantation the thin conductive layer is removed without effecting any substantial removal of the surface parts or surface adjacent parts. The specification describes the manufacture of a tetrode insulated gate field effect transistor, the applied thin conductive layer preventing charging of the gate electrodes and consequent breakdown of the underlying insulating layers during ion implantation.
Abstract translation: 在半导体本体中注入离子的方法,其中薄的导电层被施加在离子束将被引导的表面部分或相邻部分的表面上。 离子穿透薄层,其维持表面部分或表面相邻部分,包括存在时的金属电极层,处于共同的电位。 可以防止在植入时对所述部件的薄层充电的适当连接。 在植入之后,移除薄导电层,而不会实质上去除表面部分或表面相邻部分。 本说明书描述了四极绝缘栅场效应晶体管的制造,所施加的薄导电层防止栅电极的充电,并导致在离子注入期间底层绝缘层的破坏。
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公开(公告)号:US3653978A
公开(公告)日:1972-04-04
申请号:US3653978D
申请日:1969-03-07
Applicant: PHILIPS CORP
Inventor: ROBINSON DAVID PHYTHIAN , BEALE JULIAN ROBERT ANTHONY , SHANNON JOHN MARTIN , KERR JOHN ANTHONY , DAS MUKUNDA BEHARI
IPC: H01L21/265 , H01L21/76 , H01L21/8236 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/00 , H01L29/10 , H01L29/78 , H01L7/54
CPC classification number: H01L29/7838 , H01L21/26513 , H01L21/823807 , H01L27/0883 , H01L27/0925 , H01L29/00 , H01L29/1045 , Y10S148/053 , Y10S148/118 , Y10S148/145
Abstract: A method for making an IGFET is described. The method utilizes impurity ion implantation into the surface channel to determine the conductivity thereof. The advantages include special impurity profiles providing improved performance, better control over important parameters such as threshold voltage, the manufacture of improved tetrodes, and the manufacture of improved ICs using for example N- and P-channel devices, and depletion and enhancement devices combined in a single chip.
Abstract translation: 描述了制造IGFET的方法。 该方法利用杂质离子注入表面通道来确定其电导率。 这些优点包括提供改进性能的特殊杂质分布,更好地控制诸如阈值电压,改进的四极杆的制造以及使用例如N和P沟道器件的改进的IC的制造,以及组合的耗尽和增强器件 单芯片
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