公开(公告)号：US20160380167A1

公开(公告)日：2016-12-29

申请号：US14753847

申请日：2015-06-29

Applicant: POINT ENGINEERING CO., LTD.

Inventor： Bum Mo AHN ,  Young Woon JEON ,  Kyong Su YOO

IPC: H01L33/58 ,  H05K1/18 ,  H05K1/02 ,  H01L33/48 ,  H01L33/62

CPC classification number: H05K1/182 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/97

Abstract: Disclosed are an uncut chip plate and a chip substrate. The uncut chip plate includes: conductive portions laminated in one direction to constitute the uncut chip plate; insulation portions alternately laminated with the conductive portions to electrically isolate the conductive portions; and cavities formed at a predetermined depth in a hemispherical concave shape in regions including each of the insulation portions in a corresponding relationship with unit chip substrates defined on an upper surface of the uncut chip plate. According to the present invention, an optical element chip package exhibiting a high illuminance in a central portion can be realized through the use of an easy-to-process planar lens. Furthermore, as compared with a case where a hemispherical lens is used, it is possible to reduce the thickness of the chip package. This makes it possible to reduce the thickness of a device to which the chip package is applied.

Abstract translation: 公开了未切割的芯片板和芯片基板。 未切割的芯片板包括：在一个方向上层叠以构成未切割的芯片板的导电部分; 绝缘部分与导电部分交替地层叠以电绝缘导电部分; 以及在与所述未切割的芯片板的上表面上限定的单位芯片基板对应的关系中，包括每个所述绝缘部分的区域以预定深度形成半球形凹形的空腔。 根据本发明，可以通过使用易于处理的平面透镜来实现在中心部分中呈现高照度的光学元件芯片封装。 此外，与使用半球形透镜的情况相比，可以减小芯片封装的厚度。 这使得可以减小应用芯片封装的器件的厚度。

公开(公告)号：US20210244836A1

公开(公告)日：2021-08-12

申请号：US17167938

申请日：2021-02-04

Applicant: POINT ENGINEERING CO., LTD.

Inventor： Bum Mo AHN ,  Young Woon JEON ,  Min Woo CHOI

IPC: A61L2/10

Abstract: Proposed is a UV sterilizer. In a UV sterilizer according to an embodiment of the present disclosure, a light source module that emits ultraviolet (UV) light is provided between an upper body and a lower body where a fluid flows, thereby sterilizing a fluid by irradiating the flowing fluid with UV light.

公开(公告)号：US20160380159A1

公开(公告)日：2016-12-29

申请号：US14753869

申请日：2015-06-29

Applicant: POINT ENGINEERING CO., LTD.

Inventor： Ki Myung NAM ,  Young Woon JEON ,  Kyoung Ja YUN

IPC: H01L33/48 ,  H01L33/54 ,  H01L33/62 ,  H01L33/58

CPC classification number: H01L33/486 ,  H01L33/44 ,  H01L33/483 ,  H01L33/54 ,  H01L33/58 ,  H01L33/62 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/0066

Abstract: A chip substrate includes laminated conductive portions, and laminated insulation portions that electrically isolate the conductive portions, with a cavity in a recessed shape in a region including the insulation portions on an upper surface of the chip substrate. The substrate includes an insulation layer on the upper surface, excluding a region of the cavity, and a continuous plating layer along a periphery of the chip substrate on the insulation layer. A portion of a top surface of each insulation portion is exposed in the cavity, and another portion of the top surface of each insulation portion is coated with the insulation layer. A chip package includes a chip substrate, with an optical element sealed in the cavity by a sealing member or lens.

Abstract translation: 芯片基板包括层叠导电部分和层叠绝缘部分，其将导电部分与在芯片基板的上表面上包括绝缘部分的区域中的凹陷形状的腔体电隔离。 基板包括在上表面上的不包括空腔的区域的绝缘层，以及沿着绝缘层上的芯片基板的周边的连续镀层。 每个绝缘部分的顶表面的一部分暴露在空腔中，并且每个绝缘部分的顶表面的另一部分涂覆有绝缘层。 芯片封装包括芯片基板，光学元件通过密封构件或透镜密封在空腔中。