公开(公告)号：US20190122892A1

公开(公告)日：2019-04-25

申请号：US16154930

申请日：2018-10-09

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Shogo OKITA ,  Atsushi HARIKAI ,  Akihiro ITOU ,  Noriyuki MATSUBARA

IPC分类号： H01L21/3065 ,  H01L21/67 ,  H01L21/683 ,  H01L21/687 ,  H01L21/311 ,  H01L21/677

摘要： Provided is a plasma processing method which comprises steps of preparing a conveying carrier including a holding sheet and a frame provided on a peripheral region of the holding sheet, adhering the substrate on the holding sheet in an inner region inside the peripheral region to hold the substrate on the conveying carrier, sagging the holding sheet in the inner region, setting the conveying carrier on a stage provided within a plasma processing apparatus to contact the holding sheet on the stage so that the holding sheet in the inner region touches the stage before the holding sheet in the peripheral region does, and plasma processing the substrate.

公开(公告)号：US20220181209A1

公开(公告)日：2022-06-09

申请号：US17456914

申请日：2021-11-30

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Atsushi HARIKAI ,  Shogo OKITA ,  Akihiro ITOU ,  Toshiyuki TAKASAKI

IPC分类号： H01L21/78 ,  H01L21/3065 ,  H01L21/304

摘要： The element chip manufacturing method includes: a preparing process of preparing a substrate 1 including a plurality of element regions EA and a dividing region DA, the substrate 1 having a first principal surface 1X and a second principal surface 1Y; a groove forming process of forming a groove 13 in the dividing region DA from the first principal surface 1X side; and a grinding process of grinding the substrate 1 from the second principal surface 1Y side, to divide the substrate 1 into a plurality of element chips 20. The groove 13 includes a first region 13a constituted by a side surface having a first surface roughness, and a second region 13b constituted by a side surface having a second surface roughness larger than the first surface roughness. In the grinding process, grinding of the substrate 1 is performed until reaching the first region 13a of the groove 13.

公开(公告)号：US20210287913A1

公开(公告)日：2021-09-16

申请号：US17188005

申请日：2021-03-01

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Shogo OKITA ,  Atsushi HARIKAI ,  Akihiro ITOU

IPC分类号： H01L21/311 ,  H01L21/78 ,  H01L21/683

摘要： An etching method including: a preparation step of preparing a resin layer and an electronic component supported thereby; and a resin etching step of etching the resin layer. The electronic component has a first surface covered with a protective film, a second surface opposite thereto, and a sidewall therebetween. The second surface is facing the resin layer. The resin layer is larger than the electronic component when seen from the first surface side. The resin etching step includes: a deposition step of depositing a first film, using a first plasma, on a surface of the protective film and a surface of the resin layer; and a removal step of removing, using a second plasma, the first film deposited on the resin layer and at least part of the resin layer. The deposition and removal steps are alternately repeated, with the protective film allowed to continue to exist.

公开(公告)号：US20230102635A1

公开(公告)日：2023-03-30

申请号：US17905100

申请日：2020-12-04

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Shogo OKITA ,  Akihiro ITOU ,  Atsushi HARIKAI

IPC分类号： H01L21/02 ,  H01L21/027 ,  H01L21/3065

摘要： An electronic component cleaning method including: a preparation step of preparing an electronic component having a first surface covered with a protective film, a second surface opposite to the first surface, a sidewall between the first and second surfaces, and an adhering matter adhering to the sidewall; and a sidewall cleaning step of cleaning the sidewall. The sidewall cleaning step includes a deposition step of depositing a first film on the protective film and a surface of the adhering matter, using a first plasma, and a removal step of removing the first film deposited on the surface of the adhering matter, together with at least part of the adhering matter, using a second plasma. In the sidewall cleaning step, the deposition step and the removal step are alternately repeated a plurality of times, so as to allow the protective film to continue to exist.

公开(公告)号：US20200294791A1

公开(公告)日：2020-09-17

申请号：US16809755

申请日：2020-03-05

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Shogo OKITA ,  Atsushi HARIKAI ,  Akihiro ITOU

IPC分类号： H01L21/02 ,  H01L21/463 ,  H01L21/78

摘要： An element chip manufacturing method including: a preparing step of preparing a substrate including a plurality of element regions and a dicing region defining the element regions, the substrate having a first surface and a second surface opposite the first surface; a laser scribing step of applying a laser beam to the dicing region from a side of the first surface, to form a groove corresponding to the dicing region and being shallower than a thickness of the substrate; a cleaning step of exposing the first surface of the substrate to a first plasma, to remove debris on the groove; and a dicing step of exposing the substrate at a bottom of the groove to a second plasma after the cleaning step, to dice the substrate into element chips including the element regions. The first plasma is generated from a process gas containing a carbon oxide gas.

公开(公告)号：US20220402072A1

公开(公告)日：2022-12-22

申请号：US17806360

申请日：2022-06-10

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Hidefumi SAEKI ,  Hidehiko KARASAKI ,  Shogo OKITA ,  Atsushi HARIKAI ,  Akihiro ITOU

IPC分类号： B23K26/364 ,  B23K26/40 ,  H01L21/78 ,  H01L21/3065 ,  B23K26/0622

摘要： An element chip manufacturing method includes a step of preparing a substrate including a semiconductor layer and a wiring layer formed on the semiconductor layer, the substrate having element regions and a dicing region defining the element regions, a laser grooving step of irradiating a laser beam to the wiring layer at the dicing region, to form an aperture exposing the semiconductor layer, and a step of etching the semiconductor layer exposed from the aperture, with plasma, to divide the substrate into a plurality of element chips. The laser grooving step includes a step of irradiating a first laser beam having a first pulse width, to remove the wiring layer in an edge portion of the dicing region, and a step of irradiating a second laser beam having a second pulse width which is longer than the first pulse width, to remove the wiring layer inside from the edge portion.

公开(公告)号：US20220165577A1

公开(公告)日：2022-05-26

申请号：US17455678

申请日：2021-11-19

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Toshiyuki TAKASAKI ,  Shogo OKITA ,  Akihiro ITOU ,  Atsushi HARIKAI

IPC分类号： H01L21/3065 ,  H01L21/78

摘要： A plasma processing method including: exposing to a first plasma a substrate having a compound semiconductor layer and a mask partially covering a surface of the compound semiconductor layer, to form a protective film at least on the bottom of a groove formed in a region where the compound semiconductor layer is not covered with the mask; removing the protective film at the bottom by exposing the substrate to a second plasma, to expose the compound semiconductor layer; and removing the conductive semiconductor layer exposed at the bottom of the groove by exposing the substrate to a third plasma generated from a gas containing chlorine and/or bromine, while allowing a reaction product between the compound semiconductor layer and the third plasma to accumulate on an upper portion of the groove. The reaction product is removed by applying a high-frequency power to a stage on which the substrate is placed.

公开(公告)号：US20200098636A1

公开(公告)日：2020-03-26

申请号：US16567047

申请日：2019-09-11

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Atsushi HARIKAI ,  Shogo OKITA ,  Noriyuki MATSUBARA ,  Hidefumi SAEKI ,  Akihiro ITOU

IPC分类号： H01L21/78 ,  H01L21/683

摘要： An element chip manufacturing method including: a preparing step of preparing a first conveying carrier including a holding sheet and a frame, and a substrate held on the holding sheet, the holding sheet having a first surface and a second surface opposite the first surface, the frame attached to at least part of a peripheral edge of the holding sheet; a placing step of placing the first conveying carrier holding the substrate, on a second conveying carrier; a preprocessing step of preprocessing the substrate, after the placing step; a removing step of removing the second conveying carrier, after the preprocessing step; and a dicing step of subjecting the substrate held on the first conveying carrier to plasma exposure, after the removing step, to form a plurality of element chips from the substrate.

公开(公告)号：US20180233395A1

公开(公告)日：2018-08-16

申请号：US15893999

申请日：2018-02-12

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Shogo OKITA ,  Koji TAMURA ,  Akihiro ITOU ,  Atsushi HARIKAI ,  Noriyuki MATSUBARA

IPC分类号： H01L21/683 ,  H01L21/78 ,  H01L21/308 ,  H01L21/3065

CPC分类号： H01L21/6835 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/12 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68386

摘要： A method of manufacturing a semiconductor chip includes: preparing a semiconductor wafer; forming a mask on a front surface of the semiconductor wafer so as to cover each of the element regions and to expose the dividing region; exposing the front surface to plasma in a state where a back surface of the semiconductor wafer is held with a dicing tape to dice the semiconductor wafer into a plurality of semiconductor chips by etching the dividing region exposed from the mask up to the back surface while protecting each of the element regions with the mask from plasma; and removing the mask from the front surface together with an adhesive tape by peeling off the adhesive tape after sticking the adhesive tape to the side of the front surface.

公开(公告)号：US20210057227A1

公开(公告)日：2021-02-25

申请号：US16993466

申请日：2020-08-14

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Akihiro ITOU ,  Atsushi HARIKAI ,  Toshiyuki TAKASAKI ,  Shogo OKITA

IPC分类号： H01L21/3065 ,  H01L21/02

摘要： An element chip smoothing method including: an element chip preparation step of preparing at least one element chip including a first surface covered with a resin film, a second surface opposite the first surface, and a sidewall connecting the first surface to the second surface and having ruggedness; a sidewall cleaning step of exposing the element chip to a first plasma, to remove deposits adhering to the sidewall, with the resin film allowed to continue to exist; a sidewall oxidation step of exposing the element chip to a second plasma, after the sidewall cleaning step, to oxidize a surface of the sidewall, with the resin film allowed to continue to exist; and a sidewall etching step of exposing the element chip to a third plasma, after the sidewall oxidation step, to etch the sidewall, with the resin film allowed to continue to exist.