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公开(公告)号：US20190304838A1
公开(公告)日：2019-10-03
申请号：US16362933
申请日：2019-03-25
发明人： Hidefumi SAEKI , Atsushi HARIKAI , Shogo OKITA
IPC分类号： H01L21/78 , H01L23/544 , H01L21/268 , H01L21/3065 , B23K26/00 , B23K26/364
摘要： A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.
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公开(公告)号：US20190198396A1
公开(公告)日：2019-06-27
申请号：US16218554
申请日：2018-12-13
发明人： Hidefumi SAEKI , Atsushi HARIKAI
IPC分类号： H01L21/78 , H01L21/3065 , H01L21/304 , H01L21/268 , H01L21/311
摘要： A manufacturing process of an element chip, comprising a substrate preparing step for preparing a substrate having first and second sides opposed to each other, and including a plurality of dicing regions and element regions defined by the dicing regions, the first side being covered by a protective film, a first laser-grooving step for forming a plurality of grooves by irradiating a laser beam to the first side along the dicing regions, and a plasma-dicing step for plasma-etching the substrate along the grooves in depth through a plasma exposure, thereby to dice the substrate into a plurality of element chips, wherein the second side of the substrate and an annular frame are held on a holding sheet in the substrate preparing step, and wherein the laser beam is irradiated only in a region inside an outer edge of the substrate in the first laser-grooving step.
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公开(公告)号：US20180174908A1
公开(公告)日：2018-06-21
申请号：US15811733
申请日：2017-11-14
IPC分类号： H01L21/78 , H01L21/268
CPC分类号： H01L21/78 , B23K26/0622 , B23K26/364 , B23K26/402 , B23K2101/40 , B23K2103/172 , B23K2103/56 , H01J37/32 , H01L21/2686 , H01L21/30655
摘要： A manufacturing process of an element chip comprises a preparation step for preparing a substrate, the substrate including first and second streets crossing each other to define a plurality of element regions. Also, it comprises a first shallow-groove formation step for radiating a laser beam along the first streets to form a plurality of first shallow grooves being shallower than a thickness of the substrate, a second shallow-groove formation step for radiating the laser beam along the second streets to form a plurality of second shallow grooves being shallower than a thickness of the substrate, a first groove formation step for radiating the laser beam along the first shallow grooves to form a plurality of first grooves, and a plasma dicing step for etching the substrate along the first grooves and the second shallow grooves by a plasma exposure to dice the substrate into a plurality of element chips.
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公开(公告)号：US20210407855A1
公开(公告)日：2021-12-30
申请号：US17471661
申请日：2021-09-10
发明人： Hidefumi SAEKI , Atsushi HARIKAI , Shogo OKITA
IPC分类号： H01L21/78 , H01L23/544 , H01L21/268 , B23K26/00 , B23K26/364 , H01L21/3065
摘要： A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.
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公开(公告)号：US20190074185A1
公开(公告)日：2019-03-07
申请号：US16103025
申请日：2018-08-14
IPC分类号： H01L21/3065 , B23K26/0622 , H01L21/67 , H01L21/02 , H01L21/475
摘要： Method of manufacturing an element chip which can suppress residual debris in plasma dicing. A back surface of a semiconductor wafer is held on a dicing tape. Then, a surface of the wafer is coated with a mask that includes a water-insoluble lower mask and a water-soluble upper mask. Subsequently, an opening is formed in the mask by irradiating the mask with laser light to expose a dividing region. Then, the semiconductor wafer is caused to come into contact with water to remove the upper mask covering each of the element regions while leaving the lower layer. After that, the wafer is exposed to plasma to perform etching on the dividing region exposed from the opening until the etching reaches the back surface, thereby dicing the semiconductor wafer into a plurality of element chips. Thereafter, the lower layer mask left on the front surface of the semiconductor chips is removed.
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公开(公告)号：US20220406660A1
公开(公告)日：2022-12-22
申请号：US17806367
申请日：2022-06-10
IPC分类号： H01L21/78 , H01L21/268
摘要： An element chip manufacturing method includes a step of preparing a substrate including a semiconductor layer and a wiring layer formed on the semiconductor layer and having a plurality of element regions and a dicing region defining the element regions, a laser grooving step of irradiating a laser beam to the wiring layer at the dicing region, to form an aperture exposing the semiconductor layer, and an individualization step of etching the semiconductor layer exposed from the aperture, with plasma, to divide the substrate into a plurality of element chips. The laser grooving step including a step of irradiating a first laser beam, to form a first groove exposing the semiconductor layer in the dicing region, and a step of irradiating a second laser beam, with a beam center positioned outside a side wall of the first groove, to widen the first groove into the aperture.
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公开(公告)号：US20220402072A1
公开(公告)日：2022-12-22
申请号：US17806360
申请日：2022-06-10
IPC分类号： B23K26/364 , B23K26/40 , H01L21/78 , H01L21/3065 , B23K26/0622
摘要： An element chip manufacturing method includes a step of preparing a substrate including a semiconductor layer and a wiring layer formed on the semiconductor layer, the substrate having element regions and a dicing region defining the element regions, a laser grooving step of irradiating a laser beam to the wiring layer at the dicing region, to form an aperture exposing the semiconductor layer, and a step of etching the semiconductor layer exposed from the aperture, with plasma, to divide the substrate into a plurality of element chips. The laser grooving step includes a step of irradiating a first laser beam having a first pulse width, to remove the wiring layer in an edge portion of the dicing region, and a step of irradiating a second laser beam having a second pulse width which is longer than the first pulse width, to remove the wiring layer inside from the edge portion.
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公开(公告)号：US20200098636A1
公开(公告)日：2020-03-26
申请号：US16567047
申请日：2019-09-11
IPC分类号： H01L21/78 , H01L21/683
摘要： An element chip manufacturing method including: a preparing step of preparing a first conveying carrier including a holding sheet and a frame, and a substrate held on the holding sheet, the holding sheet having a first surface and a second surface opposite the first surface, the frame attached to at least part of a peripheral edge of the holding sheet; a placing step of placing the first conveying carrier holding the substrate, on a second conveying carrier; a preprocessing step of preprocessing the substrate, after the placing step; a removing step of removing the second conveying carrier, after the preprocessing step; and a dicing step of subjecting the substrate held on the first conveying carrier to plasma exposure, after the removing step, to form a plurality of element chips from the substrate.
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公开(公告)号：US20200381304A1
公开(公告)日：2020-12-03
申请号：US16881165
申请日：2020-05-22
IPC分类号： H01L21/82 , H01L21/56 , H01L21/311 , H01L21/3065
摘要： An element chip manufacturing method including: attaching a substrate via a die attach film (DAF) to a holding sheet; forming a protective film that covers the substrate; forming an opening in the protective film with a laser beam, to expose the substrate in the dicing region therefrom; exposing the substrate to a first plasma to etch the substrate exposed from the opening, so that a plurality of element chips are formed from the substrate and so that the DAF is exposed from the opening; exposing the substrate to a second plasma to etch the die attach film exposed from the opening, so that the DAF is split so as to correspond to the element chips; and detaching the element chips from the holding sheet, together with the split DAF. The DAF is larger than the substrate. The method includes irradiating the laser beam to the DAF protruding from the substrate.
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公开(公告)号：US20190221479A1
公开(公告)日：2019-07-18
申请号：US16246627
申请日：2019-01-14
IPC分类号： H01L21/78 , H01L21/3065 , H01L21/683 , H01L21/56
CPC分类号： H01L21/78 , H01L21/3065 , H01L21/561 , H01L21/6836
摘要： A manufacturing process of an element chip comprises steps of preparing a substrate including dicing regions and element regions, attaching a holding sheet held on a frame with a die attach film in between, forming a protective film covering the substrate, forming a plurality of grooves in the protective film along the dicing regions, plasma-etching the substrate to expose the die attach film and then die attach film along the dicing regions, and picking up each of the element chips along with the separated die attach film away from the holding sheet, wherein the die attach film has an area greater than that of the substrate, and wherein the protective film includes a first covering portion covering the substrate and a second covering portion covering at least a portion of the die attach film that extends beyond an outer edge of the substrate.
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