System, method, and computer program for explicitly tunable I/O device controller
    2.
    发明授权
    System, method, and computer program for explicitly tunable I/O device controller 有权
    用于显式可调I / O设备控制器的系统,方法和计算机程序

    公开(公告)号:US06687765B2

    公开(公告)日:2004-02-03

    申请号:US09764614

    申请日:2001-01-16

    IPC分类号: G06F1314

    摘要: Structure, method, and computer program for an explicitly tunable device controller. Method supports high-performance I/O without imposing additional overhead during normal input/output operations. Tuning is performed during explicit pre-I/O operation phase. In one embodiment, invention provides a method for tuning device controller operating characteristics to suit attributes of a data stream in which the method comprises: monitoring a data stream and collecting attributes of the monitored data stream; generating performance metrics of the data stream based on the collected attributes and a plurality of different assumed device controller configurations; comparing expected performance of the plurality of different device controller configurations for effectiveness with a future data stream having similar data stream type attributes to the monitored data stream; and selecting device controller characteristics to provide an effective match between the data stream type and the device controller configuration. In one embodiment, the controller configuration is adjusted automatically and dynamically during normal I/O operations to suit the particular input/output operation encountered. Configuration information may be selected for example, from such parameters as data redundancy level, RAID level, number of drives in a RAID array, memory module size, cache line size, direct I/O or cached I/O mode, read-ahead cache enable or read-ahead cache disable, cache line aging, cache size, or combinations thereof. A storage device controller, such as a RAID controller, implementing the inventive method in computer program software or firmware is also provided as are computer system having a host computer coupled to a storage system through the inventive controller.

    摘要翻译: 用于显式可调谐设备控制器的结构,方法和计算机程序。 方法支持高性能I / O,而不会在正常输入/输出操作期间产生额外的开销。 在显式的I / O操作阶段执行调试。 在一个实施例中,本发明提供了一种用于调整设备控制器操作特性以适应数据流的属性的方法,其中所述方法包括:监视数据流并收集所监视的数据流的属性; 基于收集的属性和多个不同的假定的设备控制器配置来生成数据流的性能度量; 将具有类似数据流类型属性的未来数据流的有效性的多个不同设备控制器配置的预期性能与监视的数据流进行比较; 并选择设备控制器特性来提供数据流类型和设备控制器配置之间的有效匹配。 在一个实施例中,在正常I / O操作期间自动和动态地调整控制器配置以适合遇到的特定输入/输出操作。 配置信息可以例如从数据冗余级别,RAID级别,RAID阵列中的驱动器数量,存储器模块大小,高速缓存行大小,直接I / O或高速缓存I / O模式,预读缓存 启用或预读高速缓存禁用,高速缓存行老化,高速缓存大小或其组合。 还提供了在计算机程序软件或固件中实现本发明方法的存储设备控制器,例如RAID控制器,其计算机系统具有通过本发明的控制器耦合到存储系统的主计算机。

    Encoding and decoding data using store and exclusive or operations
    3.
    发明授权
    Encoding and decoding data using store and exclusive or operations 有权
    使用存储和排除或操作对数据进行编码和解码

    公开(公告)号:US08365053B2

    公开(公告)日:2013-01-29

    申请号:US12473161

    申请日:2009-05-27

    申请人: Bruce M. Cassidy

    发明人: Bruce M. Cassidy

    IPC分类号: H03M13/00

    摘要: The invention provides a method, device and system for encoding and decoding data. The method includes receiving information including data units, storing the data units into a memory and encoding the data units by performing a plurality of store and exclusive-or operations on the data units resulting in encoded symbols Sn, where n is a positive integer.

    摘要翻译: 本发明提供了一种用于对数据进行编码和解码的方法,装置和系统。 该方法包括接收包括数据单元的信息,将数据单元存储到存储器中并通过对数据单元执行多个存储和异或运算来对数据单元进行编码,从而产生编码符号Sn,其中n是正整数。

    Method and apparatus for distributing data across multiple disk drives
    4.
    发明授权
    Method and apparatus for distributing data across multiple disk drives 有权
    用于在多个磁盘驱动器之间分配数据的方法和装置

    公开(公告)号:US06502166B1

    公开(公告)日:2002-12-31

    申请号:US09474826

    申请日:1999-12-29

    申请人: Bruce M. Cassidy

    发明人: Bruce M. Cassidy

    IPC分类号: G11B1300

    摘要: The present invention relates generally to data storage systems having user configurable levels of input/output (“I/O”) performance and fault tolerance. To provide exceptional performance to read data requests in a RAID data storage subsystem with 100 percent redundancy, the data striping procedure (22) of the present invention distributes data across disk drives in a data storage subsystem without any backward writes, and thereby provides exception I/O performance with 100 percent data redundancy.

    摘要翻译: 本发明一般涉及具有用户可配置水平的输入/输出(“I / O”)性能和容错的数据存储系统。 为了提供卓越的性能以读取具有100%冗余度的RAID数据存储子系统中的数据请求,本发明的数据条带化过程(22)在数据存储子系统中的数据存储子系统中的数据分配过程中分发数据,而不会有任何反向写入,从而提供异常I / O性能,100%数据冗余。

    Computer storage drive array with command initiation at respective drives
    5.
    发明授权
    Computer storage drive array with command initiation at respective drives 失效
    计算机存储驱动器阵列,在相应的驱动器上启动命令

    公开(公告)号:US5774641A

    公开(公告)日:1998-06-30

    申请号:US528484

    申请日:1995-09-14

    IPC分类号: G06F11/10 G06F11/20 G06F11/00

    CPC分类号: G06F11/1076

    摘要: In a data processing system, a redundant array of storage devices is provided for storing data from a host data processing system. When a selected, storage device receives a write command, the selected storage device reads old data from the logical address specified in the write command, and temporarily stores such old data in a buffer. Next, the selected storage device writes new data from the host data processing system to a location specified in the write command. Thereafter, an XOR operation is performed in the selected storage device between the new data and the old data to produce intermediate data. The intermediate data is then transferred to a second storage device within the array. Within the second storage device, old parity data is read from the media in the second storage device and placed in a buffer. Next, an XOR operation is performed in the second storage device between the intermediate data and the old parity data to produce new parity data. Finally, such new parity data is written in the second storage device. Commands for reading data, writing data, performing XOR operations, and transferring data are all generated and executed within the storage devices which comprise the redundant array of storage devices.

    摘要翻译: 在数据处理系统中,存储设备的冗余阵列用于存储来自主机数据处理系统的数据。 当选定的存储装置接收到写命令时,所选择的存储装置从写命令中指定的逻辑地址读取旧数据,并将这些旧数据临时存储在缓冲器中。 接下来,所选择的存储装置将来自主机数据处理系统的新数据写入写入命令中指定的位置。 此后,在所选择的存储设备中在新数据和旧数据之间执行XOR操作以产生中间数据。 然后将中间数据传送到阵列内的第二存储设备。 在第二存储设备内,从第二存储设备中的介质读取旧的奇偶校验数据并将其放置在缓冲器中。 接下来,在第二存储装置中在中间数据和旧奇偶校验数据之间执行XOR操作,以产生新的奇偶校验数据。 最后,这种新的奇偶校验数据被写入第二存储设备。 用于读取数据,写入数据,执行XOR操作和传输数据的命令都在包含存储设备的冗余阵列的存储设备中生成和执行。

    ENCODING AND DECODING DATA
    6.
    发明申请
    ENCODING AND DECODING DATA 有权
    编码和解码数据

    公开(公告)号:US20100306621A1

    公开(公告)日:2010-12-02

    申请号:US12473161

    申请日:2009-05-27

    申请人: Bruce M. Cassidy

    发明人: Bruce M. Cassidy

    IPC分类号: H03M13/07 G06F11/10

    摘要: The invention provides a method, device and system for encoding and decoding data. The method includes receiving information including data units, storing the data units into a memory and encoding the data units by performing a plurality of store and exclusive-or operations on the data units resulting in encoded symbols Sn, where n is a positive integer.

    摘要翻译: 本发明提供了一种用于对数据进行编码和解码的方法,装置和系统。 该方法包括接收包括数据单元的信息,将数据单元存储到存储器中并通过对数据单元执行多个存储和异或运算来对数据单元进行编码,从而产生编码符号Sn,其中n是正整数。

    Methods and apparatus for isolating a power network from a load during
an overcurrent condition
    7.
    发明授权
    Methods and apparatus for isolating a power network from a load during an overcurrent condition 失效
    在过电流条件下将电力网与负载隔离的方法和装置

    公开(公告)号:US5488533A

    公开(公告)日:1996-01-30

    申请号:US192921

    申请日:1994-02-07

    申请人: Bruce M. Cassidy

    发明人: Bruce M. Cassidy

    IPC分类号: H02H9/00 H02H9/02 H02H3/20

    CPC分类号: H02H9/025 H02H9/001

    摘要: A branch protection circuit is provided to isolate a power network from a faulty load such as an overcurrent condition. The circuit employs a current-sense field effect transistor formed from two power field effect transistors integrated onto the same silicon substrate. The current-sense-FET is provided to detect if the electrical current in the larger FET has exceeded a predetermined threshold level. The circuit does not measure the specific current flowing through the transistors, and the circuitry employed to detect if the threshold current level is exceeded is significantly less complex than circuitry otherwise required to determine a specific current flow through one of the transistors.

    摘要翻译: 提供分支保护电路以将电力网络与诸如过电流状况的故障负载隔离。 电路采用集成在同一硅衬底上的两个功率场效应晶体管形成的电流检测场效应晶体管。 提供电流检测FET以检测较大FET中的电流是否已经超过预定阈值电平。 该电路不测量流过晶体管的比电流,并且用于检测阈值电流电平是否超过的电路比另外需要确定通过晶体管之一的特定电流的电路复杂得多。

    Critically continuous boost converter
    8.
    发明授权
    Critically continuous boost converter 失效
    严格连续升压转换器

    公开(公告)号:US5367247A

    公开(公告)日:1994-11-22

    申请号:US927590

    申请日:1992-08-10

    摘要: In critically continuous boost converters used to achieve high power factor and low input current harmonic distortion, a power FET is driven by a pulse generator whose on time is essentially constant over a single line cycle. Off time is terminated when current in the inductor falls to zero and the voltage on the side of the inductor not connected to the input voltage is less that the input voltage. A delay causes turn on to occur at the minimum of the voltage ring to minimize turn on switching losses. At voltages when the input voltage is less than one half of the output voltage part of the on time, turn on occurs with negative current flowing through the FET power switch and the inductor. Part of the turn on time is used to charge the inductor current back to zero before energy can begin to flow back into the output of the converter. A correction circuit is provided which extends the on time as a function of the input and output voltage to avoid dead time around the zero voltage crossover of the sinusoidal input voltage which when rectified provides the input voltage to the converter.

    摘要翻译: 在用于实现高功率因数和低输入电流谐波失真的临时连续升压转换器中,功率FET由脉冲发生器驱动,脉冲发生器的导通时间在单个线路周期内基本上是恒定的。 当电感中的电流下降到零并且不连接到输入电压的电感器侧的电压小于输入电压时,关断时间终止。 延迟导致在电压环的最小值处发生导通,以最小化开关损耗。 在输入电压小于导通时间的输出电压的一半的电压下,当负载电流流过FET功率开关和电感器时,会导通。 导通时间的一部分用于将电感电流充电至零,然后能量开始流回转换器的输出。 提供了一种校正电路,其作为输入和输出电压的函数将导通时间延长,以避免正弦输入电压的零电压交叉周围的死区时间,该正弦输入电压在整流时向转换器提供输入电压。

    Drive circuit for thermal printer
    9.
    发明授权
    Drive circuit for thermal printer 失效
    热敏打印机的驱动电路

    公开(公告)号:US4345845A

    公开(公告)日:1982-08-24

    申请号:US275183

    申请日:1981-06-19

    CPC分类号: B41J2/355 B41J2/325

    摘要: An electrode drive configuration for a resistive ribbon thermal printer utilizes as a feedback a monitored signal representative of an internal ribbon voltage at the print point. A monitoring contact is preferably located on the opposite side of the printhead from the drive signal return contact and the feedback signal is used to cancel the effects voltage drop variations in the common return portion of the drive signal path.

    摘要翻译: 用于电阻色带热敏打印机的电极驱动配置利用表示打印点处的内部色带电压的监视信号作为反馈。 监控触点优选地位于与驱动信号返回触点相对的打印头的相对侧,并且反馈信号用于消除驱动信号路径的公共返回部分中的影响电压降变化。

    Unclocked sense ampllifier
    10.
    发明授权
    Unclocked sense ampllifier 失效
    非定时感应放大器

    公开(公告)号:US3992637A

    公开(公告)日:1976-11-16

    申请号:US579354

    申请日:1975-05-21

    CPC分类号: G11C16/26 G11C16/0466

    摘要: This specification describes a differential sense amplifier serving balanced sense lines. An imbalance in bias potential on the sense lines holds the sense amplifier in an insensitive state until just before data is to be read on the sense lines. Then a shunting device connected across the sense lines and across the inputs to the differential amplifier is activated to reduce the imbalance and thereby sensitize the differential amplifier. This shunting device is controlled by a feedback path that senses the biasing condition and shuts off the shunting device when the amplifier is in condition to perform the Read cycle.

    摘要翻译: 本说明书描述了用于平衡感测线路的差分读出放大器。 感测线上的偏置电位的不平衡将感测放大器保持在不敏感状态,直到在读取线上的数据被读取。 然后,激励连接在感测线路和差分放大器的输入端的分流装置,以减少不平衡,从而使差分放大器敏感。 该分流装置由感测偏置条件的反馈路径控制,并且当放大器处于执行读周期的条件时,该分流装置切断分流装置。