公开(公告)号：US20070061547A1

公开(公告)日：2007-03-15

申请号：US11222577

申请日：2005-09-09

申请人： Paul Jordan ,  Manish Shah ,  Gregory Grohoski

发明人： Paul Jordan ,  Manish Shah ,  Gregory Grohoski

IPC分类号： G06F12/00

CPC分类号： G06F12/1054 ,  G06F12/1027 ,  G06F12/109 ,  G06F2212/656 ,  G06F2212/682 ,  G06F2212/683

摘要： In one embodiment, a processor comprising at least one translation lookaside buffer (TLB) and a control unit coupled to the TLB. The control unit is configured to track whether or not at least one update to the TLB is pending for at least one of a plurality of strands. Each strand comprises hardware to support a different thread of a plurality of concurrently activateable threads in the processor. The strands share the TLB, and the control unit is configured to delay a demap operation issued from one of the estrands responsive to the pending update, if any.

摘要翻译： 在一个实施例中，处理器包括至少一个翻译后备缓冲器（TLB）和耦合到该TLB的控制单元。 控制单元被配置为跟踪针对多个线段中的至少一个的至少一个对TLB的更新是否待决。 每条链包括用于支持处理器中多个可同时激活的线程的不同线程的硬件。 链路共享TLB，并且控制单元被配置为响应于待决更新（如果有的话）延迟从一个estrand发出的解映射操作。

公开(公告)号：US20070061548A1

公开(公告)日：2007-03-15

申请号：US11222614

申请日：2005-09-09

申请人： Paul Jordan ,  Manish Shah ,  Gregory Grohoski

发明人： Paul Jordan ,  Manish Shah ,  Gregory Grohoski

IPC分类号： G06F12/00

CPC分类号： G06F12/1027 ,  G06F2212/682 ,  G06F2212/683

摘要： In one embodiment, a processor comprises a plurality of processor cores and an interconnect to which the plurality of processor cores are coupled. Each of the plurality of processor cores comprises at least one translation lookaside buffer (TLB). A first processor core is configured to broadcast a demap command on the interconnect responsive to executing a demap operation. The demap command identifies one or more translations to be invalidated in the TLBs, and remaining processor cores are configured to invalidate the translations in the respective TLBs. The remaining processor cores transmit a response to the first processor core, and the first processor core is configured to delay continued processing subsequent to the demap operation until the responses are received from each of the remaining processor cores.

摘要翻译： 在一个实施例中，处理器包括多个处理器核和多个处理器核耦合到的互连。 多个处理器核心中的每一个包括至少一个平移后备缓冲器（TLB）。 第一处理器核心被配置为响应于执行解映射操作而在互连上广播解映射命令。 解映射命令标识在TLB中将被无效的一个或多个翻译，并且剩余的处理器核被配置为使相应TLB中的翻译无效。 剩余的处理器核心向第一处理器核心发送响应，并且第一处理器核心被配置为延迟解映射操作之后的持续处理，直到从每个其余处理器核心接收到响应。

公开(公告)号：US20070043531A1

公开(公告)日：2007-02-22

申请号：US11589492

申请日：2006-10-30

申请人： Nicolai Kosche ,  Gregory Grohoski ,  Paul Jordan

发明人： Nicolai Kosche ,  Gregory Grohoski ,  Paul Jordan

IPC分类号： G21C17/00

CPC分类号： G06F11/3466 ,  G06F11/3447 ,  G06F11/3471 ,  G06F11/3476 ,  G06F2201/86 ,  G06F2201/865 ,  G06F2201/88

摘要： A system and method for precisely identifying an instruction causing a performance-related event is disclosed. The instruction may be detected while in a pipeline stage of a microprocessor preceding a writeback stage and the microprocessor's architectural state may not be updated until after information identifying the instruction is captured. The instruction may be flushed from the pipeline, along with other instructions from the same thread. A hardware trap may be taken when the instruction is detected and/or when an event counter overflows or is within a given range of overflowing. A software trap handler may capture and/or log information identifying the instruction, such as one or more extended address elements, before returning control and initiating a retry of the instruction. The captured and/or logged information may be stored in an event space database usable by a data space profiler to identify performance bottlenecks in the application containing the instruction.

摘要翻译： 公开了一种用于精确识别引起性能相关事件的指令的系统和方法。 在回写阶段之前的微处理器的流水线级中可以检测该指令，并且直到在识别出指令的信息被捕获之后才能更新微处理器的架构状态。 可以从管道中刷新指令，以及来自同一线程的其他指令。 当检测到指令和/或当事件计数器溢出或处于给定的溢出范围内时，可能会采取硬件陷阱。 软件陷阱处理程序可以在返回控制和重新启动指令之前捕获和/或记录标识指令的信息，例如一个或多个扩展地址元素。 捕获的和/或记录的信息可以存储在可由数据空间分析器使用的事件空间数据库中，以识别包含该指令的应用中的性能瓶颈。

公开(公告)号：US20060161760A1

公开(公告)日：2006-07-20

申请号：US11026187

申请日：2004-12-30

申请人： Paul Jordan ,  William Kucharski ,  Roman Zajcew ,  Ashley Saulsbury ,  Quinn Jacobson

发明人： Paul Jordan ,  William Kucharski ,  Roman Zajcew ,  Ashley Saulsbury ,  Quinn Jacobson

IPC分类号： G06F9/44

CPC分类号： G06F12/1036 ,  G06F9/3851 ,  G06F12/1045 ,  G06F2212/1016

摘要： The present invention provides a method and apparatus for increased efficiency for translation lookaside buffers by collapsing redundant translation table entries into a single translation table entry (TTE). In the present invention, each thread of a multithreaded processor is provided with multiple context registers. Each of these context registers is compared independently to the context of the TTE. If any of the contexts match (and the other match conditions are satisfied), then the translation is allowed to proceed. Two applications attempting to share one page but that still keep separate pages can then employ three total contexts. One context is for one application's private use; one of the contexts is for the other application's private use; and a third context is for the shared page. In one embodiment of the invention, two contexts are implemented per thread. However, the teachings of the present invention can be extended to a higher number of contexts per thread.

摘要翻译： 本发明提供了一种用于通过将冗余转换表条目折叠到单个转换表条目（TTE）中来提高翻译后备缓冲器效率的方法和装置。 在本发明中，多线程处理器的每个线程都具有多个上下文寄存器。 这些上下文寄存器中的每一个独立地与TTE的上下文进行比较。 如果任何上下文匹配（并且满足其他匹配条件），则允许翻译继续。 尝试共享一个页面但仍然保持分页的两个应用程序可以使用三个总上下文。 一个上下文是一个应用程序的私人使用; 其中一个环境用于其他应用程序的私人使用; 第三个上下文是共享页面。 在本发明的一个实施例中，每个线程实现两个上下文。 然而，本发明的教导可以扩展到每个线程的更多数量的上下文。

公开(公告)号：US06976205B1

公开(公告)日：2005-12-13

申请号：US09962724

申请日：2001-09-21

申请人： Syrus Ziai ,  Paul Jordan ,  Craig Robson ,  Ryan Donohue ,  Fong Pong

发明人： Syrus Ziai ,  Paul Jordan ,  Craig Robson ,  Ryan Donohue ,  Fong Pong

IPC分类号： H03M13/09

CPC分类号： H04L69/16 ,  H04L1/0061 ,  H04L69/12 ,  H04L69/163 ,  H04L69/164 ,  H04L69/326

摘要： A method is described that involves performing a checksum calculation on a section of data within an inbound packet before the section of data is first stored into a system memory. Another method is described that involves moving a section of data within an outbound packet from a system memory to an offload memory. Then, removing the section of data from the offload memory; and performing a checksum calculation on the section of data. An apparatus is described that includes a central processing unit that is communicatively coupled with a network processing offload unit, wherein the network processing offload unit calculates a checksum upon a section of data located within an inbound packet, and calculates a checksum upon a section of data within an outbound packet.

摘要翻译： 描述了一种方法，其涉及在将数据段首次存储到系统存储器中之前对入站分组中的数据部分执行校验和计算。 描述了另一种方法，其涉及将出站分组内的一部分数据从系统存储器移动到卸载存储器。 然后，从卸载存储器中删除数据部分; 并对数据部分执行校验和计算。 描述了一种装置，其包括与网络处理卸载单元通信耦合的中央处理单元，其中所述网络处理卸载单元针对位于入站分组内的数据部分计算校验和，并且在一部分数据上计算校验和 在一个出站包中。

公开(公告)号：US20060202436A1

公开(公告)日：2006-09-14

申请号：US11433946

申请日：2006-05-15

申请人： Robert Huff ,  Paul Jordan ,  William Forquer

发明人： Robert Huff ,  Paul Jordan ,  William Forquer

IPC分类号： B23B31/12

CPC分类号： B23B31/1238 ,  B23B31/123 ,  B23B2226/33 ,  B23B2228/10 ,  B23B2231/14 ,  B23B2231/38 ,  B23B2231/44 ,  Y10S279/902 ,  Y10T279/17615 ,  Y10T279/17632

摘要： A non-impact keyless chuck suitable for use with manual or powered drivers is disclosed. The chuck comprises a body which carries a rotatable split nut having a relatively fine thread and a plurality of slidable jaws, which may be identical, driven by the rotatable nut. An anti-friction bearing is disposed between the rotatable nut and a bearing thrust ring mounted on the body. A clutch or torque limiting mechanism is provided to limit the tightening torque to a predetermined value while the loosening torque may be limited or unlimited. The front sleeve, and rear sleeve, if used, may be formed from a structural plastic to reduce manufacturing costs. A relatively soft elastomeric grip boot may be placed on the front sleeve to improve the grip and temporarily restrain and center the tool during chuck tightening or loosening operations. A relatively soft elastomeric grip boot may also be placed on the rear sleeve, if used.

公开(公告)号：US07274706B1

公开(公告)日：2007-09-25

申请号：US09841943

申请日：2001-04-24

申请人： Tung Nguyen ,  Fong Pong ,  Paul Jordan ,  Syrus Ziai ,  Al Chang ,  Greg Grohoski

发明人： Tung Nguyen ,  Fong Pong ,  Paul Jordan ,  Syrus Ziai ,  Al Chang ,  Greg Grohoski

IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L12/66 ,  H04J3/16 ,  H04J3/22

CPC分类号： H04L12/56

摘要： Methods and systems for processing data communicated over a network. In one aspect, an exemplary embodiment includes processing a first group of network packets in a first processor which executes a first network protocol stack, where the first group of network packets are communicated through a first network interface port, and processing a second group of network packets in a second processor which executes a second network protocol stack, where the second group of network packets is communicated through the first network interface port. Other methods and systems are also described.

摘要翻译： 用于处理通过网络传送的数据的方法和系统。 在一个方面，一个示例性实施例包括处理执行第一网络协议栈的第一处理器中的第一组网络分组，其中第一组网络分组通过第一网络接口端口传送，以及处理第二组网络 执行第二网络协议栈的第二处理器中的分组，其中第二组网络分组通过第一网络接口端口传送。 还描述了其它方法和系统。

公开(公告)号：US20060004988A1

公开(公告)日：2006-01-05

申请号：US10880917

申请日：2004-06-30

申请人： Paul Jordan

发明人： Paul Jordan

IPC分类号： G06F15/00

CPC分类号： G06F9/3851 ,  G06F9/3861 ,  G06F9/3891

摘要： A method and mechanism for controlling threads in a multithreaded multicore processor. A processor includes multiple cores, each of which are capable of executing multiple threads. A control register which is shared by each of the cores is utilized to control the status of the threads in the processing system. In one embodiment, the shared register includes a single bit for each thread in the processor. Depending upon the value written to a bit of the shared register, one of three results may occur with respect to a thread which corresponds to the bit. In one embodiment, writing a “0” to a bit of the shared register will cause a corresponding thread to be Parked. Writing a “1” to a bit of the shared register will cause a corresponding thread to either be UnParked or be Reset. Whether writing a “1” to a bit of the register causes the corresponding thread to be UnParked or Reset depends upon a state of the processor.

摘要翻译： 一种用于在多线程多核处理器中控制线程的方法和机制。 处理器包括多个核，每个核能够执行多个线程。 由每个核共享的控制寄存器用于控制处理系统中的线程的状态。 在一个实施例中，共享寄存器包括处理器中每个线程的单个位。 根据写入共享寄存器的位的值，可以针对对应于该位的线程发生三个结果之一。 在一个实施例中，将“0”写入共享寄存器的一位将导致相应的线程被停放。 将一个“1”写入共享寄存器的一个位将导致相应的线程被取消停止或被重置。 是否将一个“1”写入寄存器的一位将导致相应的线程为“未停止”或“重置”取决于处理器的状态。

公开(公告)号：US20050141346A1

公开(公告)日：2005-06-30

申请号：US10839972

申请日：2004-05-05

申请人： David Rawls ,  Rebecca Rawls ,  Allan Ross ,  William McWhirter ,  John Weaver ,  Paul Jordan ,  Anthony Sucec

发明人： David Rawls ,  Rebecca Rawls ,  Allan Ross ,  William McWhirter ,  John Weaver ,  Paul Jordan ,  Anthony Sucec

IPC分类号： G04B47/00

CPC分类号： G09B19/00

摘要： A portable device, such as a pager-type device or card module, generates and guides a user through a customized smoking cessation plan. The device calculates intervals between smoking events (when the user is allowed to smoke) based on user input information and the day in the plan. The intervals increase as the plan progresses. The device alerts the user when a smoking event occurs. The user may place the device in a silent mode during periods when smoking would be inconvenient.

摘要翻译： 诸如寻呼机型设备或卡模块的便携式设备通过定制的戒烟计划产生和引导用户。 该设备根据用户输入信息和计划中的日期，计算吸烟事件之间的间隔（用户允许吸烟时）。 间隔时间随着计划的进展而增加。 设备会在吸烟事件发生时提醒用户。 在吸烟不便的时期，用户可以将设备置于静音模式。

公开(公告)号：US5347779A

公开(公告)日：1994-09-20

申请号：US728256

申请日：1991-07-11

申请人： Paul Jordan

发明人： Paul Jordan

IPC分类号： E04B1/70 ,  E04B1/74 ,  E04F17/04 ,  E04H1/00 ,  F24F5/00 ,  F24F13/08 ,  F24J2/04

CPC分类号： F24J2/0444 ,  F24F5/0075 ,  F24F2005/0082 ,  F24F2007/004 ,  F24F2221/50 ,  Y02B10/20 ,  Y02B30/92 ,  Y02E10/44

摘要： A high-rise building comprises an exterior wall and a sheath, which is spaced in front of said wall. Vertically extending flow channels are provided between said wall and said sheath and are open at their bottom and top and may be used to supply air to and from the interior of said building and to air-condition the interior of said building. To permit an effective control of the conditions of the ambient air adjoining said sheath, each of said flow passages communicates with the ambient air adjoining said sheath through a plurality of vertically spaced apart intake openings distributed throughout the height of said sheath.

摘要翻译： 高层建筑物包括外壁和护套，其在所述壁的前面间隔开。 垂直延伸的流动通道设置在所述壁和所述护套之间并且在其底部和顶部是敞开的，并且可以用于向所述建筑物的内部和从所述建筑物的内部供应空气并且使所述建筑物的内部空调。 为了有效地控制邻接所述护套的环境空气的条件，每个所述流动通道通过分布在所述护套的整个高度处的多个垂直间隔开的进气开口与邻接所述护套的环境空气相通。