Evaluating a multi-layered structure for voids
    7.
    发明授权
    Evaluating a multi-layered structure for voids 有权
    评估空洞的多层结构

    公开(公告)号:US07301619B2

    公开(公告)日:2007-11-27

    申请号:US11454332

    申请日:2006-06-16

    IPC分类号: G01N21/88

    摘要: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

    摘要翻译: 一种方法和装置测量两层镶嵌结构(例如在制造期间的硅晶片)的性质,并且使用两个测量来将位置识别为具有空隙。 这两个测量可以以任何方式使用,例如, 相比之下,当两个测量彼此偏离时,视为存在空白。 响应于空隙的检测,可以改变在镶嵌结构的制造中使用的工艺参数,以减少或消除要形成的结构中的空隙。

    Evaluating a multi-layered structure for voids
    8.
    发明授权
    Evaluating a multi-layered structure for voids 失效
    评估空洞的多层结构

    公开(公告)号:US07064822B2

    公开(公告)日:2006-06-20

    申请号:US11114300

    申请日:2005-04-25

    IPC分类号: G01N21/88

    摘要: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

    摘要翻译: 一种方法和装置测量两层镶嵌结构(例如在制造期间的硅晶片)的性质,并且使用两个测量来将位置识别为具有空隙。 两个测量中的一个是每单位长度的电阻。 这两个测量可以以任何方式使用,例如, 相比之下,当两个测量彼此偏离时,视为存在空白。 响应于空隙的检测,可以改变在镶嵌结构的制造中使用的工艺参数,以减少或消除要形成的结构中的空隙。

    Identifying defects in a conductive structure of a wafer, based on heat transfer therethrough
    9.
    发明授权
    Identifying defects in a conductive structure of a wafer, based on heat transfer therethrough 有权
    基于通过其中的热传递识别晶片的导电结构中的缺陷

    公开(公告)号:US06971791B2

    公开(公告)日:2005-12-06

    申请号:US10090287

    申请日:2002-03-01

    摘要: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.

    摘要翻译: 将热施加到包括一个或多个通孔的导电结构,并且测量在加热点处或附近的温度。 测量的温度表示导热结构中靠近加热点的各种特征(例如通路和/或迹线)的完整性或缺陷。 具体而言,较高的温度测量(与参考结构中的测量相比)表示从加热点减少的热传递,因此表示缺陷。 参考结构可以与导电结构(例如,提供基线)或模具外部在相同的晶片(例如,在测试结构中)或晶片外部(例如,在参考晶片中)处于相同的裸片中,这取决于 该实施例。