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    Arrangement, phase locked loop and method for noise shaping in a phase-locked loop
    1.
    发明授权
    Arrangement, phase locked loop and method for noise shaping in a phase-locked loop 有权
    锁相环的排列，锁相环和噪声整形方法

    公开(公告)号：US07385451B2

    公开(公告)日：2008-06-10

    申请号：US10537634

    申请日：2003-11-27

    申请人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

    发明人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

    IPC分类号： H03L7/00

    CPC分类号： H03M7/3022 ,  H03L7/1976

    摘要： A noise shaping arrangement for a phase locked loop includes a first order sigma-delta modulator arranged to provide a first-order quantized output and a feedback path output. A second order sigma-delta modulator is arranged to receive the feedback path output and provides a second order quantized output. A combination block combines the first and second order quantized outputs to provide a combined third order quantized output, which provides noise shaping with a frequency notch spectrum. In this way a new quantization noise shape of third order is provided, such that quantization phase noise may be lowered, the PLL loop bandwidth may be increased, modulation phase error may be reduced and PLL locking speed increased.

    摘要翻译： 用于锁相环的噪声整形装置包括布置成提供一阶量化输出和反馈路径输出的一阶Σ-Δ调制器。 第二级Σ-Δ调制器被布置成接收反馈路径输出并提供二阶量化输出。 组合块组合了第一和第二阶量化输出以提供组合的三阶量化输出，其提供具有频率陷波频谱的噪声整形。 以这种方式，提供三阶新的量化噪声形状，使得量化相位噪声可能降低，PLL环路带宽可能增加，调制相位误差可能降低，PLL锁定速度提高。

    High-efficiency low-cost power supply for radio frequency systems
    2.
    发明授权
    High-efficiency low-cost power supply for radio frequency systems 有权
    射频系统高效低成本电源

    公开(公告)号：US08401500B1

    公开(公告)日：2013-03-19

    申请号：US12706544

    申请日：2010-02-16

    申请人： Ruediger Bauder ,  Nadim Khlat ,  Edward T. Spears ,  Jean-Frederic Chiron ,  Philippe Gorisse

    发明人： Ruediger Bauder ,  Nadim Khlat ,  Edward T. Spears ,  Jean-Frederic Chiron ,  Philippe Gorisse

    IPC分类号： H01Q11/12 ,  H04K3/00

    CPC分类号： G06F1/26 ,  H04K3/00 ,  H04K2203/30

    摘要： The present disclosure relates to an RF power amplifier (PA) power supply that includes a series pass circuit coupled across a direct current (DC)-to-DC converter to receive a power supply input signal, such as provided from a battery, to provide a power supply output signal to at least a first RF PA based on an output setpoint. Control circuitry selects between a switching supply operating mode and a non-switching supply operating mode based on the output setpoint. During the switching supply operating mode, the DC-to-DC converter provides the power supply output signal and during the non-switching supply operating mode, the series pass circuit provides the power supply output signal.

    摘要翻译： 本公开涉及一种RF功率放大器（PA）电源，其包括跨直流（DC）至DC转换器耦合的串联传递电路，以接收诸如由电池提供的电源输入信号，以提供 基于输出设定点至少至少第一RF PA的电源输出信号。 控制电路根据输出设定值在开关电源工作模式和非开关电源工作模式之间进行选择。 在开关电源工作模式期间，DC-DC转换器提供电源输出信号，在非开关电源工作模式期间，串联电路提供电源输出信号。

    HIGH EFFICIENCY DC-DC CONVERTER
    4.
    发明申请
    HIGH EFFICIENCY DC-DC CONVERTER 有权
    高效DC-DC转换器

    公开(公告)号：US20110204962A1

    公开(公告)日：2011-08-25

    申请号：US13013986

    申请日：2011-01-26

    申请人： Philippe Gorisse ,  Nadim Khlat

    发明人： Philippe Gorisse ,  Nadim Khlat

    IPC分类号： G05F1/10

    CPC分类号： H02M3/07 ,  H02M2003/072

    摘要： A charge pump includes an input, an output, and a fixed voltage node; a first capacitor and at least a second capacitor; and a plurality of switches adapted to selectively couple the first capacitor and the at least the second capacitor to the input, the output, and the fixed voltage node. A switch controller is adapted to switch the plurality of switches in response to at least three phase signals to provide fixed gains. A phase generator is adapted to generate the at least three phase signals, wherein at least one of the at least three phase signals has a duty cycle that is different from at least one other of the at least three phase signals. The phase generator is also adapted to adjust the frequency of a clock signal used to generate the at least three phase signals so that a minimum switching frequency is provided.

    摘要翻译： 电荷泵包括输入，输出和固定电压节点; 第一电容器和至少第二电容器; 以及多个开关，适于将第一电容器和至少第二电容器选择性地耦合到输入端，输出端和固定电压节点。 开关控制器适于响应于至少三个相位信号切换多个开关以提供固定增益。 相位发生器适于产生至少三个相位信号，其中至少三个相位信号中的至少一个具有不同于至少三个相位信号中的至少另一个的占空比。 相位发生器还适于调整用于产生至少三个相位信号的时钟信号的频率，从而提供最小的开关频率。

    High efficiency DC-DC converter
    5.
    发明授权
    High efficiency DC-DC converter 有权
    高效率DC-DC转换器

    公开(公告)号：US09362818B2

    公开(公告)日：2016-06-07

    申请号：US13013986

    申请日：2011-01-26

    申请人： Philippe Gorisse ,  Nadim Khlat

    发明人： Philippe Gorisse ,  Nadim Khlat

    IPC分类号： H02M3/07

    CPC分类号： H02M3/07 ,  H02M2003/072

    摘要： A charge pump includes an input, an output, and a fixed voltage node; a first capacitor and at least a second capacitor; and a plurality of switches adapted to selectively couple the first capacitor and the at least the second capacitor to the input, the output, and the fixed voltage node. A switch controller is adapted to switch the plurality of switches in response to at least three phase signals to provide fixed gains. A phase generator is adapted to generate the at least three phase signals, wherein at least one of the at least three phase signals has a duty cycle that is different from at least one other of the at least three phase signals. The phase generator is also adapted to adjust the frequency of a clock signal used to generate the at least three phase signals so that a minimum switching frequency is provided.

    摘要翻译： 电荷泵包括输入，输出和固定电压节点; 第一电容器和至少第二电容器; 以及多个开关，适于将第一电容器和至少第二电容器选择性地耦合到输入端，输出端和固定电压节点。 开关控制器适于响应于至少三个相位信号切换多个开关以提供固定增益。 相位发生器适于产生至少三个相位信号，其中至少三个相位信号中的至少一个具有不同于至少三个相位信号中的至少另一个的占空比。 相位发生器还适于调整用于产生至少三个相位信号的时钟信号的频率，从而提供最小的开关频率。

    SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING
    7.
    发明申请
    SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING 有权
    分离VCC和通用VCC电源管理架构进行包络跟踪

    公开(公告)号：US20130234793A1

    公开(公告)日：2013-09-12

    申请号：US13602856

    申请日：2012-09-04

    申请人： Nadim Khlat ,  Michael R. Kay ,  Philippe Gorisse

    发明人： Nadim Khlat ,  Michael R. Kay ,  Philippe Gorisse

    IPC分类号： H03G1/00

    CPC分类号： H03G1/00 ,  H03F1/0227

    摘要： An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.

    摘要翻译： 公开了一种包络跟踪电源和发射机控制电路。 发射机控制电路接收第一包络电源控制信号和第二包络电源控制信号。 信封跟踪电源以包括第一操作模式和第二操作模式的一组操作模式中的一种操作。 在第一操作模式和第二操作模式期间，基于第一包络电源控制信号将第一包络电源信号提供给驱动器级。 在第一操作模式期间，第二包络电源信号基于第一包络电源控制信号提供到最后级。 然而，在第二操作模式期间，第二包络电源信号基于第二包络电源控制信号提供到最后级。

    Arrangement, phase locked loop and method for noise shaping in a phase-locked loop
    8.
    发明申请
    Arrangement, phase locked loop and method for noise shaping in a phase-locked loop 有权
    锁相环的排列，锁相环和噪声整形方法

    公开(公告)号：US20060192620A1

    公开(公告)日：2006-08-31

    申请号：US10537634

    申请日：2003-11-27

    申请人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

    发明人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

    IPC分类号： H03L7/085

    CPC分类号： H03M7/3022 ,  H03L7/1976

    摘要： A noise shaping arrangement for a phase locked loop includes a first order sigma-delta modulator (500) arranged to provide a first-order quantized output and a feedback path output (508). A second order sigma-delta modulator (520) is arranged to receive the feedback path output (508) and provides a second order quantized output. A combination block (530) combines the first and second order quantized outputs to provide a combined third order quantized output (540), which provides noise shaping with a frequency notch spectrum. In this way a new quantization noise shape of third order is provided, such that quantization phase noise may be lowered, the PLL loop bandwidth may be increased, modulation phase error may be reduced and PLL locking speed increased.

    摘要翻译： 用于锁相环的噪声整形装置包括布置成提供一阶量化输出和反馈路径输出（508）的第一级Σ-Δ调制器（500）。 第二级Σ-Δ调制器（520）被布置成接收反馈路径输出（508）并提供二阶量化输出。 组合块（530）组合第一和第二阶量化输出以提供组合的三阶量化输出（540），其提供具有频率陷波频谱的噪声整形。 以这种方式，提供三阶新的量化噪声形状，使得量化相位噪声可能降低，PLL环路带宽可能增加，调制相位误差可能降低，PLL锁定速度提高。

    Split VCC and common VCC power management architecture for envelope tracking
    9.
    发明授权
    Split VCC and common VCC power management architecture for envelope tracking 有权
    分离VCC和公共VCC电源管理架构进行信封跟踪

    公开(公告)号：US08942652B2

    公开(公告)日：2015-01-27

    申请号：US13602856

    申请日：2012-09-04

    申请人： Nadim Khlat ,  Michael R. Kay ,  Philippe Gorisse

    发明人： Nadim Khlat ,  Michael R. Kay ,  Philippe Gorisse

    IPC分类号： H01Q11/12 ,  H04B1/04 ,  H03G1/00 ,  H03F1/02

    CPC分类号： H03G1/00 ,  H03F1/0227

    摘要： An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.

    摘要翻译： 公开了一种信封跟踪电源和发射机控制电路。 发射机控制电路接收第一包络电源控制信号和第二包络电源控制信号。 信封跟踪电源以包括第一操作模式和第二操作模式的一组操作模式中的一种操作。 在第一操作模式和第二操作模式期间，基于第一包络电源控制信号将第一包络电源信号提供给驱动器级。 在第一操作模式期间，第二包络电源信号基于第一包络电源控制信号提供到最后级。 然而，在第二操作模式期间，第二包络电源信号基于第二包络电源控制信号提供到最后级。

    Split low noise amplifier
    10.
    发明授权
    Split low noise amplifier 有权

    公开(公告)号：US09705537B1

    公开(公告)日：2017-07-11

    申请号：US12563679

    申请日：2009-09-21

    申请人： Ruediger Bauder ,  Nadim Khlat ,  Todd Gillenwater ,  Bob Sowell

    发明人： Ruediger Bauder ,  Nadim Khlat ,  Todd Gillenwater ,  Bob Sowell

    IPC分类号： H04B1/10 ,  H04B1/16 ,  H04B1/04

    CPC分类号： H04B1/0458 ,  H04B1/0053 ,  H04B1/0064 ,  H04B1/16

    摘要： Embodiments of the present disclosure relate to a multi-mode RF system, which is capable of transmitting and receiving RF signals using any of multiple RF communications bands. The multi-mode RF system may integrate RF band specific bandpass filters and low noise amplifiers (LNAs) into a single front-end module, such that each filter and amplifier pair provide selection and gain for at least one RF communications band. Outputs of the LNAs may be combined to provide one or more common signals to a transceiver module, which processes baseband signals associated with the RF communications bands. By integrating the filters and amplifiers into a single module, the filters and amplifiers may be closely coupled to one another, thereby supporting short signal paths between the filters and amplifiers, and having impedances high enough to provide good filter selectivity.