摘要:
A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device, and forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the step of epitaxially growing the starting layer, wherein each contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material.
摘要:
A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device, and forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the step of epitaxially growing the starting layer, wherein each contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material.
摘要:
A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device, and forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the step of epitaxially growing the starting layer, wherein each contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material.
摘要:
A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device, and forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the step of epitaxially growing the starting layer, wherein each contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material.
摘要:
A method manufactures a vertical-gate MOS transistor integrated in a semiconductor chip having a main surface. The method includes: forming a trench gate extending into the chip from the main surface to a gate depth, by forming a control gate and an insulation layer for insulating the control gate from the chip. Forming the trench gate includes: forming a trench extending into the chip from the main surface to a protection depth less than the gate depth, the trench having a lateral wall and a bottom wall with an edge portion of the lateral wall extending from the main surface being inclined outwardly with respect to the remaining portion of the lateral wall; forming a first auxiliary insulation layer in the trench; removing a bottom wall of the first auxiliary insulation layer; extending the trench to the gate depth; and forming a second auxiliary insulation layer in the trench.
摘要:
A process for the fabrication of an integrated device in a semiconductor chip envisages: forming a semiconductor layer partially suspended above a semiconductor substrate and constrained to the substrate by temporary anchorages; dividing the layer into a plurality of portions laterally separated from one another; and removing the temporary anchorages, in order to free the portions.
摘要:
A method manufactures a vertical-gate MOS transistor integrated in a semiconductor chip having a main surface. The method includes: forming a trench gate extending into the chip from the main surface to a gate depth, by forming a control gate and an insulation layer for insulating the control gate from the chip. Forming the trench gate includes: forming a trench extending into the chip from the main surface to a protection depth less than the gate depth, the trench having a lateral wall and a bottom wall with an edge portion of the lateral wall extending from the main surface being inclined outwardly with respect to the remaining portion of the lateral wall; forming a first auxiliary insulation layer in the trench; removing a bottom wall of the first auxiliary insulation layer; extending the trench to the gate depth; and forming a second auxiliary insulation layer in the trench.
摘要:
A process for the fabrication of an integrated device in a semiconductor chip envisages: forming a semiconductor layer partially suspended above a semiconductor substrate and constrained to the substrate by temporary anchorages; dividing the layer into a plurality of portions laterally separated from one another; and removing the temporary anchorages, in order to free the portions.
摘要:
A method of fabricating a wafer-size photovoltaic cell module includes defining an integrated cellular structure of a light converting monolateral or bilateral junction diode in an epitaxially grown detachable layer including a first deposited metal current collecting terminal of the diode. The method also includes laminating onto the surface of the processed epitaxially grown detachable layer a film of an optical grade plastic material resistant to hydrofluoric acid solutions. The method further includes immersing the wafer in a hydrofluoric acid solution causing detachment of the epitaxially grown silicon layer laminated with the film, and polishing the surface of separation of the detached epitaxially grown layer and forming a second metal current collecting terminal of the diode by masked deposition of a metal at a temperature tolerable by the film.
摘要:
An electronic device is proposed. The device is integrated in a chip including at least one stacked layer having a front surface and a rear surface opposite the front surface, the device including: an insulating trench insulating an active region of the chip, the insulating trench having a section across each plane parallel to the front surface extending along a longitudinal line, and a front-rear contact electrically contacting the front surface to the rear surface in the active region, wherein the section of the insulating trench has a non-uniform width along the longitudinal line, and/or the device further includes at least one further insulating trench within the active region.