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公开(公告)号：US20170090182A1
公开(公告)日：2017-03-30
申请号：US14866784
申请日：2015-09-25
Applicant: Pixtronix, Inc.
Inventor： Jasper Lodewyk Steyn , Teruo Sasagawa , Takahide Kuranga
CPC classification number: H01L27/1259 , G02B26/023 , H01L29/78633
Abstract: This disclosure provides systems, methods, and apparatus for reducing ambient light reflection in a display device having a backplane incorporating low-temperature polycrystalline silicon (LTPS) transistors. Ambient reflection can be reduced by incorporating both conductive and non-conductive light-absorbing materials into the display backplane. A light-absorbing conductive material that can withstand the temperatures generated by laser annealing of LTPS transistor channels can be deposited and patterned such that its footprint substantially coincides with the footprints of the LTPS channels. After the LTPS channels are fabricated, a light-absorbing dielectric material can be deposited with a footprint extending at least below the footprints of other reflective components of the backplane to be positioned above the light-absorbing dielectric material. Together, the light-absorbing conductive material and the light-absorbing dielectric material can obstruct substantially all of the reflective surfaces within the backplane, thereby reducing reflection of ambient light by the backplane.
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公开(公告)号：US20160070096A1
公开(公告)日：2016-03-10
申请号：US14478845
申请日：2014-09-05
Applicant: Pixtronix, Inc.
Inventor： Teruo Sasagawa , Jasper Lodewyk Steyn , Patrick Forrest Brinkley , Matthew Brian Sampsell , Wilhelmus Adrianus de Groot
CPC classification number: G02B26/02 , B81B7/02 , B81B2201/047 , B81B2207/053 , B81B2207/07 , G02B26/023 , G09G3/3433 , G09G5/003 , G09G2320/041 , G09G2320/06 , G09G2330/021 , G09G2360/144
Abstract: This disclosure provides systems, methods and apparatus for locating at least a portion of the routing interconnects on the aperture plate to reduce or completely eliminate bezel space, reduce line resistance, reduce line capacitance and increase power savings. In some implementations, one aspect, the routing interconnects may electrically connect row interconnects from an array of pixels to a row voltage driver. In some implementations, a conductive spacer may be coupled between an aperture plate and a light modulator substrate and may electrically connect at least one row interconnect on the light modulator substrate to at least one routing interconnect on the aperture plate. Some or all of the routing interconnects may run through the display area of the electromechanical device. Some or all of the conductive spacers may make contact with a row interconnect and a routing interconnected within the display area, for example via a conductive contact pad.
Abstract translation: 本公开提供了用于定位孔板上的路由互连的至少一部分的系统，方法和装置，以减少或完全消除边框空间，降低线路电阻，降低线路电容并增加功率节省。 在一些实施方式中，一个方面，路由互连可以将行互连从像素阵列电连接到行电压驱动器。 在一些实施方案中，导电间隔物可以联接在孔板和光调制器基底之间，并且可以将光调制器基板上的至少一个行互连电连接到孔板上的至少一个路由互连。 部分或全部路由互连可以穿过机电设备的显示区域。 导电间隔物中的一些或全部可以与行互连和在显示区内互连的布线接触，例如经由导电接触垫。
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公开(公告)号：US20150301332A1
公开(公告)日：2015-10-22
申请号：US14256528
申请日：2014-04-18
Applicant: Pixtronix, Inc.
Inventor： Teruo Sasagawa
CPC classification number: G02B26/04 , G02B26/023 , G09F9/372 , G09G3/3433 , G09G3/346
Abstract: This disclosure provides systems, methods and apparatus for displaying images. A display apparatus includes display elements formed on a transparent substrate. An elevated aperture layer (EAL) is fabricated over the display elements. An opposing substrate is coupled to the transparent substrate, with the display elements and the EAL positioned between the two substrates. To prevent the opposing substrate from coming into contact with the EAL and potentially damaging the EAL or the display elements, a spacer is built from the same materials used to form the display elements and the EAL. The spacer extends to a distance above the transparent substrate beyond upper surface of the EAL and encapsulates layers of polymer material used in creating a mold for the EAL.
Abstract translation: 本公开提供了用于显示图像的系统，方法和装置。 显示装置包括形成在透明基板上的显示元件。 在显示元件上制造升高的开口层（EAL）。 相对的基板耦合到透明基板，显示元件和EAL定位在两个基板之间。 为了防止相对的基板与EAL接触并潜在地损坏EAL或显示元件，由用于形成显示元件和EAL的相同材料构建间隔件。 间隔物延伸到透明基板上方超过EAL的上表面的距离，并且封装用于为EAL制造模具所使用的聚合物材料层。
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4.发明申请SYSTEMS AND METHODS FOR FACILITATING REPAIR OF INOPERABLE MEMS DISPLAY ELEMENTS 审中-公开促进无法使用的MEMS显示元件修复的系统和方法公开(公告)号：US20170039961A1
公开(公告)日：2017-02-09
申请号：US14817039
申请日：2015-08-03
Applicant: Pixtronix, Inc
Inventor： Teruo Sasagawa
CPC classification number: G09G3/3433 , B81C1/00341 , G02B26/023 , G09G3/2003 , G09G3/2022 , G09G2330/08 , G09G2330/10
Abstract: This disclosure provides systems, methods, and apparatus for facilitating repair of inoperable MEMS display elements. A display apparatus can include a plurality of display elements over a substrate. Each display element can have a pixel output interconnect. The display apparatus also can include a plurality of conductive bridges each associated with the pixel output interconnects of a respective pair of adjacent display elements. A first conductive bridge can include an electrical connection between the pixel output interconnects of a first pair of adjacent display elements. A second conductive bridge associated with a second pair of adjacent display elements can be electrically isolated from the pixel output interconnects of at least one display element of the second pair of display elements. A laser or other means can be used to form an electrical connection between the first conductive bridge and the respective pair of adjacent display elements.
Abstract translation: 本公开提供了用于促进不可操作的MEMS显示元件的修复的系统，方法和装置。 显示装置可以在基板上包括多个显示元件。 每个显示元件可以具有像素输出互连。 显示装置还可以包括多个导电桥，每个导电桥与相应的一对相邻显示元件的像素输出互连相关联。 第一导电桥可以包括第一对相邻显示元件的像素输出互连之间的电连接。 与第二对相邻显示元件相关联的第二导电桥可以与第二对显示元件的至少一个显示元件的像素输出互连电隔离。 可以使用激光器或其它装置在第一导电桥和相应的一对相邻显示元件之间形成电连接。
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公开(公告)号：US09395533B2
公开(公告)日：2016-07-19
申请号：US14502255
申请日：2014-09-30
Applicant: Pixtronix, Inc.
Inventor： Teruo Sasagawa
CPC classification number: G02B26/02 , B81B2201/047 , B81C1/00039 , B81C1/00142 , B81C1/0015 , B81C1/00952 , B81C2201/013 , B81C2201/016 , G02B26/0841 , G02B26/0858 , G09G3/3433 , G09G5/10 , G09G2300/04
Abstract: This disclosure provides systems, methods and apparatus including devices that include a layer of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectomechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate.
Abstract translation: 本公开提供了包括装置的系统，方法和装置，其包括覆盖微机电装置内的薄膜部件的外表面的至少一部分的钝化材料层。 薄膜部件可以包括通过锚固件连接到基板上的导电表面的导电层。 本公开还提供了在薄膜部件的外表面上提供钝化材料层并将该薄膜部件电连接到基板上的导电表面的方法。
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Patent Agency Ranking
公开(公告)号：US20160090299A1
公开(公告)日：2016-03-31
申请号：US14724374
申请日：2015-05-28
Applicant: Pixtronix, Inc.
Inventor： Teruo Sasagawa , Junghun Chae , Jasper Lodewyk Steyn , Takeshi Hara , Asahi Yamato
CPC classification number: B81C1/00801
Abstract: This disclosure provides systems, methods and apparatus including devices that include layers of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectromechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a first layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate. The disclosure further provides processes for providing a second layer of passivation material on any exposed surfaces of the thin film component after release of the microelectromechanical device.
Abstract translation: 本公开提供了包括装置的系统，方法和装置，其包括覆盖微机电装置内的薄膜部件的外表面的至少一部分的钝化材料层。 薄膜部件可以包括通过锚固件连接到基板上的导电表面的导电层。 本公开还提供了在薄膜部件的外表面上提供第一钝化材料层并将该薄膜部件电连接到基板上的导电表面的工艺。 本公开还提供了在释放微机电装置之后在薄膜组件的任何暴露表面上提供第二钝化材料层的工艺。
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7.发明申请公开(公告)号：US20170084248A1
公开(公告)日：2017-03-23
申请号：US14861660
申请日：2015-09-22
Applicant: Pixtronix, Inc.
Inventor： Jianru Shi , Lu Lu , Ji Ma , Xiang-Dong Mi , Jignesh Gandhi , Teruo Sasagawa , Matthew Brian Sampsell
CPC classification number: G09G5/006 , G02B26/023 , G02B26/04 , G09G3/346 , G09G5/10 , G09G2310/027 , G09G2320/0626 , G09G2320/068
Abstract: This disclosure provides systems, methods, and apparatus for improving angular distribution of light and total light throughput in a display device. A display device can include first and second substrates and an array of display elements positioned between the first and second substrates. A first light blocking layer can be positioned on the first substrate and can define a first plurality of apertures. A second light blocking layer can be positioned on the second substrate and can define a first second of apertures. A plurality of reflective sidewalls can be positioned adjacent to at least one edge of a respective aperture of the first plurality of apertures. The reflective sidewalls can help to improve angular distribution of light and total light throughput of the display device.
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公开(公告)号：US20160351135A1
公开(公告)日：2016-12-01
申请号：US14724410
申请日：2015-05-28
Applicant: Pixtronix, Inc.
Inventor： Matthew Brian Sampsell , Patrick Forrest Brinkley , Isak Clark Reines , Teruo Sasagawa , Jasper Lodewyk Steyn
CPC classification number: G09G3/3433 , G02B26/04 , G09G3/20 , G09G2360/144
Abstract: Implementations described herein relate to display devices including a metal circuit layer embedded in a dielectric layer configured to provide optical properties. Trenches in the dielectric layer may be etched so that the thickness of the metal circuit layer may extend away from other circuit layers. In some implementations, the metal circuit layer can include thick metal routing lines to send data to pixels of the display device. The thick metal routing lines can provide high conductivity, minimal voltage drop, and signal speed that is sufficiently high to write data to many pixels over long distances. In some implementations, the dielectric layer can be configured to absorb light. Examples of such dielectric layers include carbon-doped spin-on-glass dielectric layers.
Abstract translation: 本文所述的实施方式涉及显示装置，其包括嵌入介质层中的金属电路层，该电介质层被配置为提供光学性质。 可以蚀刻电介质层中的沟槽，使得金属电路层的厚度可以远离其它电路层延伸。 在一些实施方式中，金属电路层可以包括用于向显示装置的像素发送数据的粗金属布线线。 厚金属布线线可以提供足够高的高导电率，最小电压降和信号速度，以便在长距离上将数据写入许多像素。 在一些实施方式中，电介质层可被配置成吸收光。 这种介电层的实例包括碳掺杂的旋涂玻璃介电层。
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公开(公告)号：US09440848B2
公开(公告)日：2016-09-13
申请号：US14724374
申请日：2015-05-28
Applicant: Pixtronix, Inc. , Sharp Corporation, Sharp Kabushiki Kaisha
Inventor： Teruo Sasagawa , Junghun Chae , Jasper Lodewyk Steyn , Takeshi Hara , Asahi Yamato
CPC classification number: B81C1/00801
Abstract: This disclosure provides systems, methods and apparatus including devices that include layers of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectromechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a first layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate. The disclosure further provides processes for providing a second layer of passivation material on any exposed surfaces of the thin film component after release of the microelectromechanical device.
Abstract translation: 本公开提供了包括装置的系统，方法和装置，其包括覆盖微机电装置内的薄膜部件的外表面的至少一部分的钝化材料层。 薄膜部件可以包括通过锚固件连接到基板上的导电表面的导电层。 本公开还提供了在薄膜部件的外表面上提供第一钝化材料层并将该薄膜部件电连接到基板上的导电表面的工艺。 本公开还提供了在释放微机电装置之后在薄膜组件的任何暴露表面上提供第二钝化材料层的工艺。
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公开(公告)号：US20160091713A1
公开(公告)日：2016-03-31
申请号：US14502255
申请日：2014-09-30
Applicant: PIXTRONIX, INC.
Inventor： Teruo Sasagawa
CPC classification number: G02B26/02 , B81B2201/047 , B81C1/00039 , B81C1/00142 , B81C1/0015 , B81C1/00952 , B81C2201/013 , B81C2201/016 , G02B26/0841 , G02B26/0858 , G09G3/3433 , G09G5/10 , G09G2300/04
Abstract: This disclosure provides systems, methods and apparatus including devices that include a layer of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectomechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate.
Abstract translation: 本公开提供了包括装置的系统，方法和装置，其包括覆盖微机电装置内的薄膜部件的外表面的至少一部分的钝化材料层。 薄膜部件可以包括通过锚固件连接到基板上的导电表面的导电层。 本公开还提供了在薄膜部件的外表面上提供钝化材料层并将该薄膜部件电连接到基板上的导电表面的方法。
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