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1.发明授权Method and apparatus for configuring and initializing a memory device and a memory channel 失效用于配置和初始化存储器件和存储器通道的方法和装置公开(公告)号：US06636957B2
公开(公告)日：2003-10-21
申请号：US09779072
申请日：2001-02-07
IPC分类号： G06F1200
CPC分类号： G06F13/4243
摘要： A method and apparatus for configuring and/or initializing memory devices. A disclosed method initializes a memory controller and a plurality of memory controller configuration registers. Serial identification numbers are assigned to memory devices coupled to the memory controller. Additionally, groups of device identification numbers, which are based at least in part on the memory device sizes, are assigned to the memory devices, and the memory devices are enabled.
摘要翻译： 一种用于配置和/或初始化存储器件的方法和装置。 所公开的方法初始化存储器控制器和多个存储器控制器配置寄存器。 串行识别号被分配给耦合到存储器控制器的存储器件。 此外，至少部分地基于存储器设备大小的设备标识号码组被分配给存储器设备，并且存储器设备被使能。
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公开(公告)号：US06532526B2
公开(公告)日：2003-03-11
申请号：US09972647
申请日：2001-10-05
IPC分类号： G06F1200
CPC分类号： G11C7/20
摘要： A method and apparatus for configuring memory devices. A disclosed bus controller includes a storage location and a control circuit. The control circuit is coupled to perform an initialization operation when a value indicating that initialization operation is stored in the storage location. The initialization operation is selected from one of a set of initialization operations that the control circuit is capable of performing.
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3.发明授权Method and apparatus for configuring a memory device and a memory channel using configuration space registers 失效使用配置空间寄存器配置存储器件和存储器通道的方法和装置公开(公告)号：US06378056B2
公开(公告)日：2002-04-23
申请号：US09186050
申请日：1998-11-03
IPC分类号： G06F1200
CPC分类号： G11C7/20
摘要： A method and apparatus for configuring memory devices. A disclosed bus controller includes a storage location and a control circuit. The control circuit is coupled to perform an initialization operation when a value indicating that initialization operation is stored in the storage location. The initialization operation is selected from one of a set of initialization operations that the control circuit is capable of performing.
摘要翻译： 一种用于配置存储器件的方法和装置。 所公开的总线控制器包括存储位置和控制电路。 当指示初始化操作存储在存储位置中的值时，控制电路被耦合以执行初始化操作。 从控制电路能够执行的一组初始化操作中选择初始化操作。
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4.发明授权Method and apparatus for configuring and initializing a memory device and a memory channel 有权用于配置和初始化存储器件和存储器通道的方法和装置公开(公告)号：US06226729B1
公开(公告)日：2001-05-01
申请号：US09186051
申请日：1998-11-03
IPC分类号： G06F1200
CPC分类号： G06F13/4243
摘要： A method and apparatus for configuring and/or initializing memory devices. A disclosed method initializes a memory controller and a plurality of memory controller configuration registers. Serial identification numbers are assigned to memory devices coupled to the memory controller. Additionally, groups of device identification numbers, which are based at least in part on the memory device sizes, are assigned to the memory devices, and the memory devices are enabled.
摘要翻译： 一种用于配置和/或初始化存储器件的方法和装置。 所公开的方法初始化存储器控制器和多个存储器控制器配置寄存器。 串行识别号被分配给耦合到存储器控制器的存储器件。 此外，至少部分地基于存储器设备大小的设备标识号码组被分配给存储器设备，并且存储器设备被使能。
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5.发明授权Method and apparatus for restoring a memory device channel when exiting a low power state 有权当退出低功率状态时恢复存储器件通道的方法和装置公开(公告)号：US06230274B1
公开(公告)日：2001-05-08
申请号：US09186049
申请日：1998-11-03
IPC分类号： G06F126
CPC分类号： G06F11/1441
摘要： A method and apparatus for restoring a memory device channel when exiting a low power state. One method involves storing a set of memory initialization values from storage locations in a memory controller into a memory that maintains values during a power down state. The values may be necessary to access a system memory. When the power down state is exited, the values are restored to the storage locations in the memory controller.
摘要翻译： 一种当退出低功率状态时恢复存储器件通道的方法和装置。 一种方法涉及将存储器初始化值的集合存储在存储器控制器中的存储位置到在断电状态期间维持值的存储器中。 这些值可能需要访问系统内存。 当退出掉电状态时，这些值将恢复到存储器控制器中的存储位置。
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公开(公告)号：US07149909B2
公开(公告)日：2006-12-12
申请号：US10143406
申请日：2002-05-09
申请人： Ying Cui , Eric C. Samson , Ariel Berkovits , Aditya Navale , David A. Wyatt , Leslie E. Cline , Joseph W. Tsang , Mark A. Blake , David I. Poisner , William A. Stevens , Vijay R. Sar-Dessai
发明人： Ying Cui , Eric C. Samson , Ariel Berkovits , Aditya Navale , David A. Wyatt , Leslie E. Cline , Joseph W. Tsang , Mark A. Blake , David I. Poisner , William A. Stevens , Vijay R. Sar-Dessai
IPC分类号： G06F1/32
CPC分类号： G06F1/3228 , G06F1/3215 , G06F1/324 , G06F1/325 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.
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公开(公告)号：US06938127B2
公开(公告)日：2005-08-30
申请号：US09962906
申请日：2001-09-25
CPC分类号： G06F9/4401
摘要： A processor-based system includes a system firmware program that is transferred to a designated region of a memory in response to an initialization (e.g., a boot sequence). When initialized, for example using at least one programmable register, the system firmware program reconfigures the memory from a first configuration (i.e., a default state) to a second configuration to receive a pattern. By changing the memory to the second configuration, the memory may be declared to be a write combining type. For storage into the memory, the pattern may be buffered in one or more data blocks. Once the pattern is stored, the memory may be restored to the first configuration. Buffered data transfers of the pattern may selectively clear the memory thus providing a rapid booting of the processor-based system.
摘要翻译： 基于处理器的系统包括响应于初始化（例如，引导顺序）而被传送到存储器的指定区域的系统固件程序。 当初始化时，例如使用至少一个可编程寄存器，系统固件程序将存储器从第一配置（即，默认状态）重新配置为接收模式的第二配置。 通过将存储器改变为第二配置，可以将存储器声明为写入组合类型。 为了存储到存储器中，可以将模式缓冲在一个或多个数据块中。 一旦模式被存储，存储器可以恢复到第一配置。 模式的缓冲数据传输可以选择性地清除存储器，从而提供基于处理器的系统的快速启动。
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公开(公告)号：US20110307878A1
公开(公告)日：2011-12-15
申请号：US13212898
申请日：2011-08-18
IPC分类号： G06F9/44
CPC分类号： G06F8/654
摘要： A method for updating platform firmware is disclosed. This capability is facilitated by a standard software abstraction for a firmware storage device, known as Firmware Volume (FV) that is managed through a Firmware File System (FFS). The FFS enables firmware files to be created, deleted, and updated individually. The FFS also enables a plurality of firmware files to be updated atomically by managing file state information via state bits stored in a file header of each firmware file, whereby an atomic change to a single state bit simultaneously causes the FFS to use an updated set of firmware files in place of an original set of firmware files.
摘要翻译： 公开了一种更新平台固件的方法。 通过固件存储设备的标准软件抽象（称为通过固件文件系统（FFS）管理的固件卷（FV））来促进此功能。 FFS使固件文件可以单独创建，删除和更新。 FFS还通过经由存储在每个固件文件的文件头中的状态位来管理文件状态信息来使原始地更新多个固件文件，从而对单个状态位的原子改变同时使得FFS使用更新的一组 固件文件代替一组原始固件文件。
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公开(公告)号：US07299463B2
公开(公告)日：2007-11-20
申请号：US09967093
申请日：2001-09-28
IPC分类号： G06F9/44
CPC分类号： G06F8/654
摘要： A method for updating platform firmware is disclosed. This capability is facilitated by a standard software abstraction for a firmware storage device, known as Firmware Volume (FV) that is managed through a Firmware File System (FFS). The FFS enables firmware files to be created, deleted, and updated individually. The FFS also enables a plurality of firmware files to be updated atomically by managing file state information via state bits stored in a file header of each firmware file, whereby an atomic change to a single state bit simultaneously causes the FFS to use an updated set of firmware files in place of an original set of firmware files.
摘要翻译： 公开了一种更新平台固件的方法。 通过固件存储设备的标准软件抽象（称为通过固件文件系统（FFS）管理的固件卷（FV））来促进此功能。 FFS使固件文件可以单独创建，删除和更新。 FFS还通过经由存储在每个固件文件的文件头中的状态位来管理文件状态信息来使原始地更新多个固件文件，从而对单个状态位的原子改变同时使得FFS使用更新的一组 固件文件代替一组原始固件文件。
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10.发明授权Method and apparatus for levelizing transfer delays for a channel of devices such as memory devices in a memory subsystem 有权用于调整诸如存储器子系统中的存储器件的设备的通道的传输延迟的方法和装置公开(公告)号：US06173345B2
公开(公告)日：2001-01-09
申请号：US09186042
申请日：1998-11-03
申请人： William A. Stevens
发明人： William A. Stevens
IPC分类号： G06F1300
CPC分类号： G11C29/842
摘要： A method and apparatus for levelizing transfer delays for a channel of devices. One method described determines a controller delay value by iteratively testing memory transfers to determine a largest transfer latency value using a subset of all available delays for at least one of a plurality of memory devices. Additionally, a memory device delay value for each of the plurality of memory devices is determined by testing memory transfers using at least one delay value for each of the plurality of memory devices.
摘要翻译： 一种用于调整设备信道的传输延迟的方法和装置。 所描述的一种方法通过迭代地测试存储器传输来确定控制器延迟值，以使用多个存储器设备中的至少一个的所有可用延迟的子集来确定最大传输等待时间值。 另外，通过使用多个存储器件中的每一个的至少一个延迟值测试存储器传输来确定多个存储器件中的每一个的存储器件延迟值。
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