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16 条记录 (耗时 0.018 秒)

    Method and apparatus for configuring and initializing a memory device and a memory channel
    1.
    发明授权
    Method and apparatus for configuring and initializing a memory device and a memory channel 失效
    用于配置和初始化存储器件和存储器通道的方法和装置

    公开(公告)号：US06636957B2

    公开(公告)日：2003-10-21

    申请号：US09779072

    申请日：2001-02-07

    申请人： William A. Stevens ,  Puthiya K. Nizar

    发明人： William A. Stevens ,  Puthiya K. Nizar

    IPC分类号： G06F1200

    CPC分类号： G06F13/4243

    摘要： A method and apparatus for configuring and/or initializing memory devices. A disclosed method initializes a memory controller and a plurality of memory controller configuration registers. Serial identification numbers are assigned to memory devices coupled to the memory controller. Additionally, groups of device identification numbers, which are based at least in part on the memory device sizes, are assigned to the memory devices, and the memory devices are enabled.

    摘要翻译： 一种用于配置和/或初始化存储器件的方法和装置。 所公开的方法初始化存储器控制器和多个存储器控制器配置寄存器。 串行识别号被分配给耦合到存储器控制器的存储器件。 此外，至少部分地基于存储器设备大小的设备标识号码组被分配给存储器设备，并且存储器设备被使能。

    Method and apparatus for configuring a memory device and a memory channel using configuration space registers
    3.
    发明授权
    Method and apparatus for configuring a memory device and a memory channel using configuration space registers 失效
    使用配置空间寄存器配置存储器件和存储器通道的方法和装置

    公开(公告)号：US06378056B2

    公开(公告)日：2002-04-23

    申请号：US09186050

    申请日：1998-11-03

    申请人： Puthiya K. Nizar ,  William A. Stevens

    发明人： Puthiya K. Nizar ,  William A. Stevens

    IPC分类号： G06F1200

    CPC分类号： G11C7/20

    摘要： A method and apparatus for configuring memory devices. A disclosed bus controller includes a storage location and a control circuit. The control circuit is coupled to perform an initialization operation when a value indicating that initialization operation is stored in the storage location. The initialization operation is selected from one of a set of initialization operations that the control circuit is capable of performing.

    摘要翻译： 一种用于配置存储器件的方法和装置。 所公开的总线控制器包括存储位置和控制电路。 当指示初始化操作存储在存储位置中的值时，控制电路被耦合以执行初始化操作。 从控制电路能够执行的一组初始化操作中选择初始化操作。

    Method and apparatus for configuring and initializing a memory device and a memory channel
    4.
    发明授权
    Method and apparatus for configuring and initializing a memory device and a memory channel 有权
    用于配置和初始化存储器件和存储器通道的方法和装置

    公开(公告)号：US06226729B1

    公开(公告)日：2001-05-01

    申请号：US09186051

    申请日：1998-11-03

    申请人： William A. Stevens ,  Puthiya K. Nizar

    发明人： William A. Stevens ,  Puthiya K. Nizar

    IPC分类号： G06F1200

    CPC分类号： G06F13/4243

    摘要： A method and apparatus for configuring and/or initializing memory devices. A disclosed method initializes a memory controller and a plurality of memory controller configuration registers. Serial identification numbers are assigned to memory devices coupled to the memory controller. Additionally, groups of device identification numbers, which are based at least in part on the memory device sizes, are assigned to the memory devices, and the memory devices are enabled.

    摘要翻译： 一种用于配置和/或初始化存储器件的方法和装置。 所公开的方法初始化存储器控制器和多个存储器控制器配置寄存器。 串行识别号被分配给耦合到存储器控制器的存储器件。 此外，至少部分地基于存储器设备大小的设备标识号码组被分配给存储器设备，并且存储器设备被使能。

    Method and apparatus for restoring a memory device channel when exiting a low power state
    5.
    发明授权
    Method and apparatus for restoring a memory device channel when exiting a low power state 有权
    当退出低功率状态时恢复存储器件通道的方法和装置

    公开(公告)号：US06230274B1

    公开(公告)日：2001-05-08

    申请号：US09186049

    申请日：1998-11-03

    申请人： William A. Stevens ,  Puthiya K. Nizar

    发明人： William A. Stevens ,  Puthiya K. Nizar

    IPC分类号： G06F126

    CPC分类号： G06F11/1441

    摘要： A method and apparatus for restoring a memory device channel when exiting a low power state. One method involves storing a set of memory initialization values from storage locations in a memory controller into a memory that maintains values during a power down state. The values may be necessary to access a system memory. When the power down state is exited, the values are restored to the storage locations in the memory controller.

    摘要翻译： 一种当退出低功率状态时恢复存储器件通道的方法和装置。 一种方法涉及将存储器初始化值的集合存储在存储器控制器中的存储位置到在断电状态期间维持值的存储器中。 这些值可能需要访问系统内存。 当退出掉电状态时，这些值将恢复到存储器控制器中的存储位置。

    Method and apparatus for power management in a memory subsystem
    6.
    发明授权
    Method and apparatus for power management in a memory subsystem 有权
    存储器子系统中的电源管理方法和装置

    公开(公告)号：US06442698B2

    公开(公告)日：2002-08-27

    申请号：US09187565

    申请日：1998-11-04

    申请人： Puthiya K. Nizar

    发明人： Puthiya K. Nizar

    IPC分类号： G06F100

    CPC分类号： G06F1/3225 ,  G06F1/3275 ,  G06F12/06 ,  Y02D10/13 ,  Y02D10/14

    摘要： According to one embodiment, the present invention discloses a method of managing power in a memory system. The memory system includes a plurality of memory devices. Each one of the memory devices is grouped in a first group or a second group. First, access to a memory device is requested. It is next determined whether the requested memory device is located in the first group. If the requested memory device is not located within the first group, it is determined whether the first group is filled to capacity. If the first group is not filled to capacity, the requested memory device is transferred to the first group. According to a further embodiment, each one of the memory devices grouped into the first group is further grouped in to a first subgroup or a second subgroup.

    摘要翻译： 根据一个实施例，本发明公开了一种管理存储器系统中的电力的方法。 存储器系统包括多个存储器件。 每个存储器件被分组在第一组或第二组中。 首先，请求访问存储设备。 接下来确定所请求的存储器件是否位于第一组中。 如果请求的存储设备不位于第一组内，则确定第一组是否被填充到容量。 如果第一组未被装入容量，则所请求的存储器件被传送到第一组。 根据另一实施例，分组到第一组中的每个存储器件进一步分组到第一子组或第二子组。

    Method and apparatus for memory address decode in memory subsystems supporting a large number of memory devices
    7.
    发明授权
    Method and apparatus for memory address decode in memory subsystems supporting a large number of memory devices 有权
    用于支持大量存储器件的存储器子系统中的存储器地址解码的方法和装置

    公开(公告)号：US06252821B1

    公开(公告)日：2001-06-26

    申请号：US09474570

    申请日：1999-12-29

    申请人： Puthiya K. Nizar ,  Michael W. Williams

    发明人： Puthiya K. Nizar ,  Michael W. Williams

    IPC分类号： G11C800

    CPC分类号： G11C8/10

    摘要： One embodiment of the invention is a method for decoding a memory access address. A portion of the memory access address is compared to a plurality of boundary values, each of the plurality of boundary values representing an uppermost address for a group of memory devices, each of the memory devices in the group having the same configuration. A group number is generated that represents an addressed group that contains an addressed memory device that contains the memory access address. A device number is generated that represents the location of the addressed memory device within the addressed group. A device selection signal is generated responsive to the group number and the device number.

    摘要翻译： 本发明的一个实施例是用于对存储器访问地址进行解码的方法。 将存储器访问地址的一部分与多个边界值进行比较，多个边界值中的每一个表示一组存储器设备的最高地址，组中的每个存储器件具有相同的配置。 生成组号，其表示包含存储器访问地址的寻址存储器设备的寻址组。 生成一个设备编号，表示寻址的组中寻址的存储器件的位置。 根据组号和设备编号产生设备选择信号。

    Memory transceiver to couple an additional memory channel to an existing memory channel
    8.
    发明授权
    Memory transceiver to couple an additional memory channel to an existing memory channel 失效
    存储收发器将附加存储器通道耦合到现有存储器通道

    公开(公告)号：US06467013B1

    公开(公告)日：2002-10-15

    申请号：US09409953

    申请日：1999-09-30

    申请人： Puthiya K. Nizar

    发明人： Puthiya K. Nizar

    IPC分类号： G06F1200

    CPC分类号： G06F13/4045 ,  G06F13/1684

    摘要： A memory repeater hub comprising a main memory channel interface circuit, an expansion control channel interface circuit, and an expansion memory channel interface circuit. The main memory channel interface circuit receives a memory control packet and a memory data packet from a main memory channel. The expansion control channel interface circuit receives a first expansion control packet and a second expansion control packet from an expansion control channel. The expansion memory channel interface circuit selectively transmits the memory control packet to an expansion memory channel responsive to the first expansion control packet, and selectively transmits the memory data packet to the expansion memory channel responsive to the second expansion control packet.

    摘要翻译： 一种存储中继器集线器，包括主存储器通道接口电路，扩展控制通道接口电路和扩展存储器通道接口电路。 主存储器通道接口电路从主存储器通道接收存储器控制分组和存储器数据分组。 扩展控制信道接口电路从扩展控制信道接收第一扩展控制分组和第二扩展控制分组。 扩展存储器通道接口电路响应于第一扩展控制分组选择性地将存储器控制分组发送到扩展存储器通道，并且响应于第二扩展控制分组选择性地将存储器数据分组发送到扩展存储器通道。