公开(公告)号：US20250047310A1

公开(公告)日：2025-02-06

申请号：US18363290

申请日：2023-08-01

Applicant: QUALCOMM INCORPORATED

Inventor： Alper GENC ,  David Francis BERDY ,  Christian HOLENSTEIN ,  Jose CABANILLAS

IPC: H04B1/00

Abstract: A radio frequency (RF) switching system including a plurality of band filters comprising a first band filter a second band filter and a third band filter, the first, second and third band filters configured to process signals in different communication bands, a switch located between the first, second and third band filters and a first and a second antenna, the switch configured to selectively couple the first, second and third filters to the first and second antennas, the switch comprising at least a first switch element and a second switch element configured to receive complementary control signals, wherein at least the first and the second filter are configured to be simultaneously coupled to the first antenna and the switch is configured to delay at least one of the complementary control signals by an amount defined by a difference (delta) between an ON to OFF time (Toff) and an OFF to ON time (Ton) of the first switch element and the second switch element when the switch, in response to the complementary control signals, is configured to selectively connect the first antenna to the third filter instead of the second filter while the first filter is coupled to the first antenna and a first communication path through the first filter to the first antenna is active.

公开(公告)号：US20230299808A1

公开(公告)日：2023-09-21

申请号：US17655351

申请日：2022-03-17

Applicant: QUALCOMM Incorporated

Inventor： David Francis BERDY ,  Jin CHO ,  Yu Steve ZHAO ,  Christian HOLENSTEIN ,  Ryan Scott Castro SPRING ,  Jose CABANILLAS ,  Euichan MOON

IPC: H04B1/40 ,  H03H1/00

CPC classification number: H04B1/40 ,  H03H1/0007

Abstract: In certain aspects, a system includes a first filter, a second filter, a dummy load, and a switching circuit coupled to the first filter, the second filter, and the dummy load, and coupled to a first antenna and a second antenna. In a first mode, the switching circuit couples the first filter and the second filter to the first antenna, and, in a second mode, the switching circuit couples the first filter and the third filter to the first antenna and couples the second filter to the second antenna. In certain aspects, the dummy load includes a third filter.

公开(公告)号：US20180123538A1

公开(公告)日：2018-05-03

申请号：US15583890

申请日：2017-05-01

Applicant: QUALCOMM Incorporated

Inventor： Jiang CHEN ,  Jeremy GOLDBLATT ,  Jose CABANILLAS

IPC: H03G3/30 ,  H03F3/193 ,  H03F3/21 ,  H03F1/56

CPC classification number: H03G3/3042 ,  H03F1/0266 ,  H03F1/223 ,  H03F1/32 ,  H03F1/56 ,  H03F3/189 ,  H03F3/193 ,  H03F3/21 ,  H03F3/245 ,  H03F3/45179 ,  H03F3/505 ,  H03F2200/102 ,  H03F2200/211 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/537 ,  H03F2200/69 ,  H03F2203/45394 ,  H03G2201/106

Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

公开(公告)号：US20230412130A1

公开(公告)日：2023-12-21

申请号：US17808040

申请日：2022-06-21

Applicant: QUALCOMM Incorporated

Inventor： Marco CASSIA ,  Jose CABANILLAS

IPC: H03F3/24 ,  H03F3/195 ,  H04B1/04 ,  H03F1/56 ,  H03F1/52

CPC classification number: H03F3/245 ,  H03F3/195 ,  H04B1/0458 ,  H03F1/56 ,  H03F1/52 ,  H03F2200/451 ,  H04B2001/0408 ,  H03F2200/471

Abstract: Methods and apparatus for providing amplifier protection for a radio frequency (RF) front-end circuit. An example RF front-end circuit generally includes an amplifier with a gain, a first sensor configured to sense a first power (or voltage) of a first node coupled to an input of the amplifier, a second sensor configured to sense a second power (or voltage) of a second node coupled to an output of the amplifier, and logic coupled to the first and second sensors. The logic is generally configured to determine that the second power (or voltage) is outside a range based on the gain and the first power (or voltage) and to take an action to protect the amplifier based on the determination. By utilizing the techniques and apparatus described herein, protection can be provided to the amplifier(s) in an RF front-end circuit without significantly impacting the performance of the RF front-end circuit.

公开(公告)号：US20180062592A1

公开(公告)日：2018-03-01

申请号：US15441500

申请日：2017-02-24

Applicant: QUALCOMM Incorporated

Inventor： Marco CASSIA ,  Jose CABANILLAS

IPC: H03F3/217 ,  H03F3/19 ,  H03F1/56

CPC classification number: H03F3/217 ,  H03F1/0277 ,  H03F1/0288 ,  H03F1/56 ,  H03F1/565 ,  H03F3/19 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/72 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2203/21103 ,  H03F2203/21136 ,  H03F2203/21139 ,  H03F2203/21175 ,  H03F2203/7215 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03G1/00 ,  H03G1/0088 ,  H03G3/3042 ,  H03G2201/504 ,  H03G2201/506 ,  H04B1/40 ,  H04B1/401

Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.