公开(公告)号：US20160247754A1

公开(公告)日：2016-08-25

申请号：US14859318

申请日：2015-09-20

Applicant: QUALCOMM Incorporated

Inventor： Jie FU ,  Chin-Kwan KIM ,  Manuel ALDRETE ,  Milind Pravin SHAH ,  Dwayne Richard SHIRLEY

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49894 ,  H01L21/4846 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/5389 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/1533

Abstract: An integrated circuit package includes a substrate/interposer assembly having a plurality of conductive contacts and a plurality of conductive posts, such as copper posts, electrically coupled to at least some of the conductive contacts in the substrate/interposer assembly. The conductive posts are surrounded by a protective dielectric, such as a photoimageable dielectric (PID). An integrated circuit die may be disposed on the substrate/interposer assembly within an interior space surrounded by the dielectric. An additional integrated circuit die may be provided in a package-on-package (POP) configuration.

Abstract translation: 集成电路封装包括具有多个导电触点和多个导电柱（例如铜柱）的基板/插入件组件，其电耦合到衬底/插入器组件中的至少一些导电触点。 导电柱被诸如可光成像电介质（PID）的保护电介质包围。 集成电路管芯可以设置在由电介质包围的内部空间内的衬底/插入件组件上。 可以在封装封装（POP）配置中提供附加的集成电路管芯。