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公开(公告)号：US20170083040A1
公开(公告)日：2017-03-23
申请号：US14863221
申请日：2015-09-23
Applicant: QUALCOMM Incorporated
Inventor： Junmou ZHANG , Nan CHEN , Guoan ZHONG
CPC classification number: G06F1/08 , G06F21/554 , G06F2221/034 , H04L9/004 , H04L9/005
Abstract: A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may be used for detecting an incorrect clock frequency. In one example, the apparatus includes a first circuit configured to compare a clock signal period to a delay period. Additionally, in one example, the apparatus includes a second circuit configured to output a first signal. The period of the first signal may be double the clock signal period when the clock signal period is greater than the delay period. The apparatus may, in one example, also include a third circuit configured to output a second signal. The period of the second signal may be greater than double the clock signal period when the clock signal period is greater than the delay period.
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公开(公告)号：US20140321227A1
公开(公告)日：2014-10-30
申请号：US13901511
申请日：2013-05-23
Applicant: QUALCOMM Incorporated
Inventor： Zeeshan SYED , Nan CHEN , Yong XU , Michael Thomas FERTSCH , Boris ANDREEV , Zhiqin CHEN , Chang Ki KWON
IPC: G11C11/4074
CPC classification number: G11C11/4074 , G06F1/3275 , G06F1/3287 , Y02D10/14 , Y02D10/171 , Y02D50/20
Abstract: A method and an apparatus are provided. The apparatus is a hardware module that controls a power mode of a plurality of modules. The apparatus receives an indication of a desired operational frequency. Based on the received indication, the apparatus determines to switch from a first power mode associated with a first set of modules to a second power mode corresponding to the desired operational frequency and associated with a second set of modules. The apparatus enables modules in the second set of modules that are unassociated with the first power mode, stops traffic through the plurality of modules upon expiration of a time period after enabling the modules in the second set of modules that are unassociated with the first power mode, routes traffic through the second set of modules, and disables modules in the first set of modules that are unassociated with the second power mode.
Abstract translation: 提供了一种方法和装置。 该装置是控制多个模块的功率模式的硬件模块。 该装置接收到期望的操作频率的指示。 基于接收到的指示，设备确定从与第一组模块相关联的第一功率模式切换到对应于期望操作频率并与第二组模块相关联的第二功率模式。 该装置使得与第一功率模式不相关的第二组模块中的模块在启用与第一功率模式不相关的第二组模块中的模块之后的一段时间期满后停止通过多个模块的业务 通过第二组模块路由流量，并禁用与第二功率模式无关的第一组模块中的模块。
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公开(公告)号：US20180004689A1
公开(公告)日：2018-01-04
申请号：US15197524
申请日：2016-06-29
Applicant: QUALCOMM Incorporated
Inventor： Percy Tehmul MARFATIA , Rajagopal NARAYANAN , Shih-Hsin Jason HU , Nan CHEN
IPC: G06F13/16 , G11C7/22 , G11C7/10 , G11C11/417 , G11C7/04
CPC classification number: G06F13/1689 , G06F1/3225 , G06F1/324 , G06F1/3275 , G06F1/3296 , G11C5/14 , G11C7/04 , G11C7/1072 , G11C7/22 , G11C7/227 , G11C11/417
Abstract: An apparatus includes a memory, a timing circuit configured to emulate a first operation of the memory to activate a second operation of the memory, a sensor configured to emulate a portion of the timing circuit, and a controller configured to adjust an operating parameter of the memory based on the sensor emulating the portion of the timing circuit. A method is presented. The method includes at least operating a timing circuit to emulate a first operation of the memory, activating a second operation of the memory based on the emulating the first operation of the memory, emulating, by a sensor, a portion of the timing circuit. Another apparatus is presented. The apparatus includes at least a memory, a timing circuit, and means for tracking a performance of the memory based on the timing circuit tracking a memory operation.
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Patent Agency Ranking
公开(公告)号：US20200303325A1
公开(公告)日：2020-09-24
申请号：US16359319
申请日：2019-03-20
Applicant: QUALCOMM Incorporated
Inventor： Alan LEWIS , Zhengming FU , Nan CHEN , Adam POLAK , Laura FUENTES , Gregory BULLARD , Mark TODOROVICH
IPC: H01L23/00 , G06F21/75 , H01L27/144
Abstract: Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.
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公开(公告)号：US20170110958A1
公开(公告)日：2017-04-20
申请号：US14918163
申请日：2015-10-20
Applicant: QUALCOMM Incorporated
Inventor： Lingyun WANG , Yuan-cheng PAN , Junmou ZHANG , Nan CHEN , Mohamed Waleed ALLAM
CPC classification number: H02M1/14 , G06F1/189 , G06F1/206 , G06F1/26 , G06F1/3206 , G06F1/3296 , H02M1/08 , H02M3/156 , Y02D10/172
Abstract: An apparatus and a method to adjust a source voltage based on an operating voltage response are provided. The apparatus includes a circuit configured to change state from a first state to a second state comprising receiving an operating voltage from a power source through a power distribution network. The apparatus further includes a sensor configured to measure an operating voltage response to the circuit changing state to receiving the operating voltage. The apparatus further includes a control circuit configured to adjust a source voltage at the power source based on the operating voltage response measured by the sensor. The method includes changing a state to receiving an operating voltage from a power source through a power distribution network, measuring an operating voltage response to the changing state to receiving the operating voltage, and adjusting the source voltage at the power source based on the measured operating voltage response.
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公开(公告)号：US20230352426A1
公开(公告)日：2023-11-02
申请号：US18338928
申请日：2023-06-21
Applicant: QUALCOMM Incorporated
Inventor： Alan LEWIS , Zhengming FU , Nan CHEN , Adam Cezary POLAK , Laura FUENTES , Gregory BULLARD , Mark TODOROVICH
IPC: H01L23/00 , H01L27/144 , G06F21/75
CPC classification number: H01L23/576 , H01L27/1443 , G06F21/755
Abstract: Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.
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公开(公告)号：US20220238460A1
公开(公告)日：2022-07-28
申请号：US17494747
申请日：2021-10-05
Applicant: QUALCOMM Incorporated
Inventor： Alan LEWIS , Zhengming FU , Nan CHEN , Adam POLAK , Laura FUENTES , Gregory BULLARD , Mark TODOROVICH
IPC: H01L23/00 , H01L27/144 , G06F21/75
Abstract: Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.
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公开(公告)号：US20190025135A1
公开(公告)日：2019-01-24
申请号：US15657887
申请日：2017-07-24
Applicant: QUALCOMM Incorporated
Inventor： Junmou ZHANG , Guoan ZHONG , Nan CHEN
Abstract: Certain aspects of the present disclosure provide apparatus and techniques for sensing a temperature. For example, certain aspects of the present disclosure may provide a temperature sensing circuit. The temperature sensing circuit may include a first current mirror having a first branch coupled to a first transistor, a resistive element coupled between a source of the first transistor and a reference potential, and a second current mirror having a first branch coupled to a second transistor. In certain aspects, a source of the second transistor may be coupled to the reference potential, and a gate of the first transistor may be coupled to a gate of the second transistor. In certain aspects, the temperature sensing circuit may also include an oscillator having an input coupled to a third transistor of the second current mirror.
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