公开(公告)号：US20200243690A1

公开(公告)日：2020-07-30

申请号：US16846337

申请日：2020-04-12

Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.

Inventor： Gideon Segev ,  Iddo Amit ,  Alexander Henning ,  Yossi Rosenwaks

IPC: H01L29/808 ,  H01L29/417 ,  H01L29/06 ,  B82Y10/00 ,  H01L29/76 ,  H01L29/10 ,  H03K19/00 ,  H03K17/00 ,  H01L29/423 ,  H01L29/40 ,  H01L29/66 ,  H01L29/08 ,  H01L29/775

Abstract: A transistor (100), including a planar semiconducting substrate (36), a source (42) formed on the substrate, a first drain (102) formed on the substrate, and a second drain (104) formed on the substrate in a location physically separated from the first drain. At least one gate (38, 40) is formed on the substrate and is configured to selectably apply an electrical potential to the substrate in either a first spatial pattern, which causes a first conductive path (62) to be established within the substrate from the source to the first drain, or a second spatial pattern, which causes a second conductive path to be established within the substrate from the source to the second drain.

公开(公告)号：US10707355B2

公开(公告)日：2020-07-07

申请号：US15309832

申请日：2015-05-18

Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.

Inventor： Gideon Segev ,  Iddo Amit ,  Alexander Henning ,  Yossi Rosenwaks

IPC: H01L29/775 ,  H01L29/66 ,  H01L29/808 ,  H01L29/08 ,  H01L29/06 ,  H01L29/10 ,  H01L29/76 ,  B82Y10/00 ,  H01L29/417 ,  H01L29/40 ,  H01L29/423 ,  H03K17/00 ,  H03K19/00 ,  H03K17/693

Abstract: A transistor (100), including a planar semiconducting substrate (36), a source (42) formed on the substrate, a first drain (102) formed on the substrate, and a second drain (104) formed on the substrate in a location physically separated from the first drain. At least one gate (38, 40) is formed on the substrate and is configured to selectably apply an electrical potential to the substrate in either a first spatial pattern, which causes a first conductive path (62) to be established within the substrate from the source to the first drain, or a second spatial pattern, which causes a second conductive path to be established within the substrate from the source to the second drain.

公开(公告)号：US20170243983A1

公开(公告)日：2017-08-24

申请号：US15309832

申请日：2015-05-18

Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.

Inventor： Gideon Segev ,  Iddo Amit ,  Alexander Henning ,  Yossi Rosenwaks

IPC: H01L29/808 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H03K17/00 ,  H03K19/00 ,  H01L29/66 ,  H01L29/08 ,  H01L29/40

CPC classification number: H01L29/8086 ,  B82Y10/00 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/0692 ,  H01L29/0843 ,  H01L29/1066 ,  H01L29/402 ,  H01L29/417 ,  H01L29/42316 ,  H01L29/66439 ,  H01L29/66977 ,  H01L29/76 ,  H01L29/775 ,  H01L29/8083 ,  H03K17/002 ,  H03K17/693 ,  H03K19/0002

Abstract: A transistor (100), including a planar semiconducting substrate (36), a source (42) formed on the substrate, a first drain (102) formed on the substrate, and a second drain (104) formed on the substrate in a location physically separated from the first drain. At least one gate (38, 40) is formed on the substrate and is configured to selectably apply an electrical potential to the substrate in either a first spatial pattern, which causes a first conductive path (62) to be established within the substrate from the source to the first drain, or a second spatial pattern, which causes a second conductive path to be established within the substrate from the source to the second drain.