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公开(公告)号:US20190244672A1
公开(公告)日:2019-08-08
申请号:US16243789
申请日:2019-01-09
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shota OKAYAMA , Akihiko KANDA
CPC classification number: G11C16/30 , G11C5/147 , G11C29/021 , G11C29/028 , H02M1/08
Abstract: An object of the present invention is to provide a semiconductor device capable of simplifying a trimming operation. A semiconductor device according to an embodiment includes a power supply circuit and a trimming circuit. The power supply circuit includes a reference voltage generation circuit that generates a plurality of reference voltages used at the time of a trimming operation, and a voltage generation circuit that generates a plurality of power supply voltages used by a semiconductor storage device. The semiconductor device adjusts a specific reference voltage using an external reference voltage at the time of the trimming operation, and then determines trimming codes corresponding to the adjustment amounts of the power supply voltages using a plurality of reference voltages generated using the adjusted specific reference voltage and a plurality of power supply voltages corresponding to the reference voltages.
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公开(公告)号:US20240126472A1
公开(公告)日:2024-04-18
申请号:US18397851
申请日:2023-12-27
Applicant: Renesas Electronics Corporation
Inventor: Ken MATSUBARA , Takashi ITO , Takashi KURAFUJI , Yasuhiko TAITO , Tomoya SAITO , Akihiko KANDA
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0673
Abstract: A semiconductor device includes a logic circuit, a memory, and a storage device. The storage device has a first special information storage region into which special information is written before a solder reflow process, a second special information storage region into which special information for updating is written after the solder reflow process, and a data storage region. The first special information storage region is constituted by a memory cell having a high reflow resistance and in which data is retained even after the solder reflow process. The second special information storage region and the data storage region are constituted by memory cells having a low reflow resistance and in which data may not be retained during the solder reflow process.
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公开(公告)号:US20230402080A1
公开(公告)日:2023-12-14
申请号:US18317382
申请日:2023-05-15
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Koichi TAKEDA , Akihiko KANDA , Takahiro SHIMOI
CPC classification number: G11C11/1673 , G11C11/1675 , G11C7/08
Abstract: A clamp element 46 applies a fixed potential to a bit line BL at a time of a readout operation. A reference current source RCS generates a reference current Iref. An offset current source OCS1 is activated at a time of a readout operation for an OTP cell OTPC, and at a time of being activated, generates an offset current Iof1 to be subtracted from a cell current Icel. At the time of the readout operation for the OTP cell OTPC, the sense amplifier SA detects a magnitude relationship between the reference current Iref and a readout current Ird obtained by subtracting the offset current Iof1 from the cell current Icel.
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公开(公告)号:US20230025357A1
公开(公告)日:2023-01-26
申请号:US17847967
申请日:2022-06-23
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Genta WATANABE , Ken MATSUBARA , Tomoya SAITO , Akihiko KANDA , Koichi TAKEDA , Takahiro SHIMOI
IPC: G11C11/16
Abstract: A semiconductor device capable of changing a data programming process in a simple manner according to a situation is provided. The semiconductor device includes a plurality of memory cells, a programming circuit for supplying a programming current to the memory cell, and a power supply circuit for supplying power to the programming circuit. The power supply circuit includes a charge pump circuit for boosting the external power supply, a voltage of the external power supply according to the selection indication, and a selectable circuit capable of switching the boosted voltage boosted by the charge pump circuit. The control circuit further includes a control circuit for executing data programming processing by the programming circuit by switching the selection indication.
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公开(公告)号:US20220382483A1
公开(公告)日:2022-12-01
申请号:US17746437
申请日:2022-05-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Ken MATSUBARA , Takashi ITO , Takashi KURAFUJI , Yasuhiko TAITO , Tomoya SAITO , Akihiko KANDA
IPC: G06F3/06
Abstract: A semiconductor device includes a logic circuit, a memory, and a storage device. The storage device has a first special information storage region into which special information is written before a solder reflow process, a second special information storage region into which special information for updating is written after the solder reflow process, and a data storage region. The first special information storage region is constituted by a memory cell having a high reflow resistance and in which data is retained even after the solder reflow process. The second special information storage region and the data storage region are constituted by memory cells having a low reflow resistance and in which data may not be retained during the solder reflow process.
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公开(公告)号:US20160276038A1
公开(公告)日:2016-09-22
申请号:US15015894
申请日:2016-02-04
Applicant: Renesas Electronics Corporation
Inventor: Akihiko KANDA , Tamiyu KATO
IPC: G11C16/28
Abstract: The trimming range of a reference current is extended larger than that of the related art. A semiconductor device includes a reference current generating circuit that generates a reference current. The reference current includes a first base current, a second base current base current, a second base current, a temperature compensating current, and a voltage compensating current. The first base current can be trimmed. The second base current flowing opposite to the first base current can be trimmed. The temperature compensating current flows in the same direction as the first base current and has higher temperature dependence than the first and second base currents. The voltage compensating current flows in the same direction as the first base current and depends on power supply voltages more than the base currents.
Abstract translation: 参考电流的微调范围比现有技术的更大。 半导体器件包括产生参考电流的参考电流产生电路。 参考电流包括第一基极电流,第二基极电流基极电流,第二基极电流,温度补偿电流和电压补偿电流。 可以修剪第一个基极电流。 可以修整与第一基极电流相反流动的第二基极电流。 温度补偿电流沿与第一基极电流相同的方向流动,并且具有比第一和第二基极电流更高的温度依赖性。 电压补偿电流沿与第一基极电流相同的方向流动,并且取决于电源电压大于基极电流。
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