公开(公告)号：US11004749B2

公开(公告)日：2021-05-11

申请号：US16573485

申请日：2019-09-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Taro Moriya ,  Hiroshi Yanagigawa ,  Kazuhisa Mori

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/66 ,  H01L29/10 ,  H01L29/78 ,  H01L27/24 ,  H01L29/423

Abstract: A semiconductor device for suppressing a variation in characteristics caused by a current flowing at the time of breakdown is disclosed. The first power MOS transistor Q 1 and the column CLM are formed in the first element region FCM defined in the epitaxial layer NEL, and the second power MOS transistor Q 2 is formed in the second element region RCM. The first power MOS transistor Q 1 includes a first trench gate electrode TGE1, and the second power MOS transistor Q 2 includes a second trench gate electrode TGE2. The depth GDP1 of the first trench gate electrode TGE1 is shallower than the depth GDP2 of the second trench gate electrode TGE2.

公开(公告)号：US10332993B2

公开(公告)日：2019-06-25

申请号：US15912099

申请日：2018-03-05

Applicant: Renesas Electronics Corporation

Inventor： Kazuhisa Mori

IPC: H01L27/06 ,  H01L27/07 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L23/495 ,  H01L29/423 ,  H01L21/8234

Abstract: A semiconductor device with a simplified structure including an energization control element and reverse coupling protection element, and a manufacturing method therefor. Its semiconductor substrate has deep and shallow trenches in its first surface. A first n-type impurity region lies in its second surface in contact with the deep trench bottom. A p-type impurity region includes: a p-type base region to make a pn junction with the first n-type region and in contact with the shallow trench bottom; and a back gate region joined to the p-type base region, lying in the first surface. A second n-type impurity region makes a pn junction with the p-type impurity region, lying in the first surface in contact with the shallow trench side face. An n+ source region makes a pn junction with the p-type region, lying in the first surface in contact with the side faces of deep and shallow trenches.

公开(公告)号：US11557648B2

公开(公告)日：2023-01-17

申请号：US17115204

申请日：2020-12-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hiroshi Yanagigawa ,  Katsumi Eikyu ,  Masami Sawada ,  Akihiro Shimomura ,  Kazuhisa Mori

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: In a trench gate type power MOSFET having a super-junction structure, both improvement of a breakdown voltage of a device and reduction of on-resistance are achieved. The trench gate and a column region are arranged so as to be substantially orthogonal to each other in a plan view, and a base region (channel forming region) and the column region are arranged separately in a cross-sectional view.

公开(公告)号：US12125905B2

公开(公告)日：2024-10-22

申请号：US16905071

申请日：2020-06-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshinori Kaya ,  Katsumi Eikyu ,  Akihiro Shimomura ,  Hiroshi Yanagigawa ,  Kazuhisa Mori

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/0615 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7828 ,  H01L29/7831 ,  H01L29/0692

Abstract: To reduce on-resistance while suppressing a characteristic variation increase of a vertical MOSFET with a Super Junction structure, the vertical MOSFET includes a semiconductor substrate having an n-type drift region, a p-type base region formed on the surface of the n-type drift region, a plurality of p-type column regions disposed in the n-type drift region at a lower portion of the p-type base region by a predetermined interval, a plurality of trenches whose bottom surface reaches a position deeper than the p-type base region and that is disposed between the adjacent p-type column regions, a plurality of gate electrodes formed in the plurality of trenches, and an n-type source region formed on the side of the gate electrode in the p-type base region.

公开(公告)号：US10192795B2

公开(公告)日：2019-01-29

申请号：US15098072

申请日：2016-04-13

Applicant: Renesas Electronics Corporation

Inventor： Kazuhisa Mori

IPC: H01L21/66 ,  H01L27/06 ,  H01L29/78 ,  H01L23/34 ,  H01L29/739 ,  H01L29/861

Abstract: A semiconductor device including a power transistor is prevented from being broken. A cathode of a temperature sensing diode and a source of a power MOSFET are electrically coupled to each other so as to have the same potential. Such a characteristic point allows the temperature sensing diode to be disposed in a power MOSFET formation region without considering withstand voltage. This means that there is no need to provide an isolating structure that maintains a withstand voltage between the power MOSFET and the temperature sensing diode. Consequently, the power MOSFET and the temperature sensing diode can be closely disposed.