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    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09324862B2

    公开(公告)日：2016-04-26

    申请号：US14638996

    申请日：2015-03-04

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara ,  Ryo Kanda ,  Tetsu Toda

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H01L29/06

    CPC classification number: H01L29/0619 ,  H01L27/0207 ,  H01L27/092 ,  H01L29/402 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835 ,  H03K19/017509

    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.

    Abstract translation: 为了防止在晶体管周围的杂质区域中的电流泄漏，在从第一电路区域侧朝向第二电路区域侧延伸的第二导电类型区域和元件分离膜的部分在计划中彼此重叠的区域中 在平面图中，从第一电路区域侧朝向第二电路区域侧交替地设置场板和导电膜。 此外，在该区域中，场板的电位和导电膜从第一电路区域朝向第二电路区域的电位降低。 此外，导电膜中的至少一个在平面图中具有低于第二电路区域侧上与导电膜相邻的场板的电位的电位。 此外，该导电膜覆盖第二导电类型区域的至少一部分，而在第二导电类型区域的延伸方向上没有空间。

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09054070B2

    公开(公告)日：2015-06-09

    申请号：US14085942

    申请日：2013-11-21

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara

    IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

    CPC classification number: H01L29/0642 ,  H01L21/761 ,  H01L21/823481 ,  H01L27/0207 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42368 ,  H01L29/7816

    Abstract: An isolation region includes an element isolation film and a field plate electrode. The field plate electrode overlaps the element isolation film and surrounds a first circuit when seen in a plan view. A part of the field plate electrode is also positioned on a connection transistor. A source and a drain of the connection transistor are opposite to each other through the field plate electrode when seen in a plan view. In addition, the field plate electrode is divided into a first portion including a portion that is positioned on the connection transistor, and a second portion other than the first portion.

    Abstract translation: 隔离区域包括元件隔离膜和场板电极。 当在平面图中看时，场板电极与元件隔离膜重叠并围绕第一电路。 场板电极的一部分也位于连接晶体管上。 当在平面图中看时，连接晶体管的源极和漏极彼此相对通过场板电极。 此外，场板电极被分成包括位于连接晶体管上的部分的第一部分和除第一部分之外的第二部分。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08952483B2

    公开(公告)日：2015-02-10

    申请号：US14095304

    申请日：2013-12-03

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara

    IPC: H01L21/70 ,  H01L27/02 ,  H01L27/06 ,  H01L27/08

    CPC classification number: H01L27/0207 ,  H01L21/761 ,  H01L27/0635 ,  H01L27/0814 ,  H01L29/0649 ,  H01L29/402 ,  H01L29/404 ,  H01L29/66128 ,  H01L29/861 ,  H01L29/8611

    Abstract: A potential isolation element is provided separately from a diode. An n-type low-concentration region is formed on a P-type layer. A first high-concentration N-type region is positioned in the n-type low-concentration region and is connected to a cathode electrode of the diode. A second high-concentration N-type region is positioned in the n-type low-concentration region, is disposed to be spaced from a first second-conduction-type high-concentration region, and is connected to a power supply interconnection of a first circuit. A first P-type region is formed in the n-type low-concentration region, and a bottom portion thereof is connected to the P-type layer. A ground potential is applied to the first P-type region, and the first P-type region is positioned in the vicinity of the first high-concentration N-type region.

    Abstract translation: 与二极管分开提供电势隔离元件。 在P型层上形成n型低浓度区域。 第一高浓度N型区域位于n型低浓度区域中并且连接到二极管的阴极电极。 第二高浓度N型区域位于n型低浓度区域中，与第一第二导电型高浓度区域隔开，并且与第一高浓度区域的电源互连 电路。 在n型低浓度区域形成第一P型区域，其底部与P型层连接。 对第一P型区域施加接地电位，第一P型区域位于第一高浓度N型区域附近。

    Semiconductor Device
    10.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20150270390A1

    公开(公告)日：2015-09-24

    申请号：US14638996

    申请日：2015-03-04

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara ,  Ryo Kanda ,  Tetsu Toda

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40

    CPC classification number: H01L29/0619 ,  H01L27/0207 ,  H01L27/092 ,  H01L29/402 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835 ,  H03K19/017509

    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.

    Abstract translation: 为了防止在晶体管周围的杂质区域中的电流泄漏，在从第一电路区域侧朝向第二电路区域侧延伸的第二导电类型区域和元件分离膜的部分在计划中彼此重叠的区域中 在平面图中，从第一电路区域侧朝向第二电路区域侧交替地设置场板和导电膜。 此外，在该区域中，场板的电位和导电膜从第一电路区域朝向第二电路区域的电位降低。 此外，导电膜中的至少一个在平面图中具有低于第二电路区域侧上与导电膜相邻的场板的电位的电位。 此外，该导电膜覆盖第二导电类型区域的至少一部分，而在第二导电类型区域的延伸方向上没有空间。

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