公开(公告)号：US20170094280A1

公开(公告)日：2017-03-30

申请号：US15266528

申请日：2016-09-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ren IMAOKA ,  Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Kazushi AKIE ,  Ryoji HASHIMOTO

IPC: H04N19/139 ,  H04N19/61 ,  H04N19/124 ,  H04N19/42 ,  H04N19/105 ,  H04N19/159

CPC classification number: H04N19/139 ,  H04N19/105 ,  H04N19/124 ,  H04N19/132 ,  H04N19/137 ,  H04N19/159 ,  H04N19/172 ,  H04N19/174 ,  H04N19/186 ,  H04N19/439 ,  H04N19/61

Abstract: A semiconductor device includes a hash generator, a reference hash list, a frame mode determination unit, and an intra prediction unit. The hash generator generates a hash value of a target frame to be encoded. The reference hash list is to record the hash value generated by the hash generator. The frame mode determination unit compares the hash value generated by the hash generator and the hash value in the reference hash list. The intra prediction unit performs intra prediction for the target frame to be encoded. When the hash value of the target frame to be encoded coincides with any of the hash values in the reference hash list, the intra prediction unit skips an encoding process, and outputs encoded information corresponding to any of the hash values in the reference hash list.

公开(公告)号：US20180288418A1

公开(公告)日：2018-10-04

申请号：US16001559

申请日：2018-06-06

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ren IMAOKA ,  Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Kazushi AKIE ,  Ryoji HASHIMOTO

IPC: H04N19/139 ,  H04N19/137 ,  H04N19/132 ,  H04N19/172 ,  H04N19/124 ,  H04N19/105 ,  H04N19/61

Abstract: A semiconductor device includes a hash generator, a reference hash list, a frame mode determination unit, and an intra prediction unit. The hash generator generates a hash value of a target frame to be encoded. The reference hash list is to record the hash value generated by the hash generator. The frame mode determination unit compares the hash value generated by the hash generator and the hash value in the reference hash list. The intra prediction unit performs intra prediction for the target frame to be encoded. When the hash value of the target frame to be encoded coincides with any of the hash values in the reference hash list, the intra prediction unit skips an encoding process, and outputs encoded information corresponding to any of the hash values in the reference hash list.

公开(公告)号：US20180077413A1

公开(公告)日：2018-03-15

申请号：US15699801

申请日：2017-09-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazushi AKIE ,  Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Katsushige MATSUBARA ,  Hiroshi UEDA ,  Ren IMAOKA ,  Ryoji HASHIMOTO

IPC: H04N19/107 ,  H04N19/105 ,  H04N19/44 ,  H04N19/122 ,  H04N19/436 ,  H04N19/573 ,  H04N19/17 ,  G06T9/00

CPC classification number: H04N19/107 ,  G06T9/007 ,  H04N19/105 ,  H04N19/122 ,  H04N19/17 ,  H04N19/436 ,  H04N19/44 ,  H04N19/573 ,  H04N21/4728 ,  H04N21/816

Abstract: A display area can be smoothly moved.A semiconductor device sequentially receives a plurality of whole images, each of which includes a plurality of small screen images and which are temporally continuous and form a moving image, and decodes a received whole image. Here, the semiconductor device includes a reception unit that receives the whole image including the small screen images, a determination unit that determines a decoding area which includes a small screen image to be decoded and which is included in the whole image, and a decoding unit that decodes the small screen image in the decoding area which is determined by the determination unit and which is included in the whole image. The determination unit determines a new decoding area when a small screen image of intra frame appears in the decoding area.

公开(公告)号：US20160156926A1

公开(公告)日：2016-06-02

申请号：US14906901

申请日：2013-07-22

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryoji HASHIMOTO ,  Kenichi IWATA ,  Kazushi AKIE

IPC: H04N19/563 ,  H04N19/61 ,  H04N19/86 ,  H04N19/42 ,  H04N19/115 ,  H04N19/119 ,  H04N19/146 ,  H04N19/159 ,  H04N19/52 ,  H04N19/91

CPC classification number: H04N19/563 ,  H04N19/11 ,  H04N19/115 ,  H04N19/119 ,  H04N19/124 ,  H04N19/132 ,  H04N19/146 ,  H04N19/159 ,  H04N19/167 ,  H04N19/176 ,  H04N19/42 ,  H04N19/436 ,  H04N19/52 ,  H04N19/59 ,  H04N19/61 ,  H04N19/86 ,  H04N19/91

Abstract: A moving image encoding apparatus executes moving image encoding of a syntax element relating to a moving image signal VS to form an encoded bitstream CVBS. Padding processing of adding padding processing data PD to the moving image signal VS is executed prior to the moving image encoding, and the horizontal and vertical sizes of an additional moving image signal added the padding processing data are set to an integral multiple of an encoded block size in the moving image encoding. It is determined that the encoded block of the syntax element belongs to which of the moving image signal VS and the padding processing data PD. In a case where the encoded block belongs to the former, an encoded bitstream having a large code amount is formed. In a case where the encoded block belongs to the latter, an encoded bitstream having a small code amount is formed.

Abstract translation: 运动图像编码装置执行与运动图像信号VS相关的语法元素的运动图像编码，以形成编码比特流CVBS。 在运动图像编码之前执行将填充处理数据PD添加到运动图像信号VS的填充处理，并且将添加了填充处理数据的附加运动图像信号的水平和垂直尺寸设置为编码块的整数倍 尺寸在运动图像编码。 确定语法元素的编码块属于运动图像信号VS和填充处理数据PD中的哪一个。 在编码块属于前者的情况下，形成具有大码量的编码比特流。 在编码块属于后者的情况下，形成具有小代码量的编码比特流。

公开(公告)号：US20210352278A1

公开(公告)日：2021-11-11

申请号：US17380599

申请日：2021-07-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Maiki HOSOKAWA ,  Toshiyuki KAYA ,  Tetsuya SHIBAYAMA ,  Seiji MOCHIZUKI ,  Tomohiro UNE ,  Kazushi AKIE

IPC: H04N19/105 ,  H04N19/139 ,  H04N19/146 ,  H04N19/172 ,  H04N5/232

Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.