公开(公告)号：US20240143465A1

公开(公告)日：2024-05-02

申请号：US18452305

申请日：2023-08-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi HAYASE ,  Yuki HAYAKAWA ,  Toshiyuki KAYA ,  Kyohei YAMAGUCHI ,  Takahiro IRITA ,  Shinichi SHIBAHARA

IPC: G06F11/22

CPC classification number: G06F11/2284

Abstract: A semiconductor device includes first and second processor cores configured to perform a lock step operation and including first and second scan chains. The semiconductor device further includes a scan test control unit that controls a scan test of the first and second processor cores using the first and second scan chains, and a start-up control unit that outputs a reset signal for bringing the first and second processor cores into a reset state. The start-up control unit outputs an initialization scan request before the start of a lock step operation, and the scan test control unit performs an initialization scan test operation on the first and second processor cores by using an initialization pattern.

公开(公告)号：US20180276850A1

公开(公告)日：2018-09-27

申请号：US15861164

申请日：2018-01-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryuichi IGARASHI ,  Seiji MOCHIZUKI ,  Katsushige MATSUBARA ,  Toshiyuki KAYA

IPC: G06T7/00 ,  G06T3/40 ,  G06T5/50 ,  G06T7/55

CPC classification number: G06T7/97 ,  G06T3/4092 ,  G06T5/50 ,  G06T7/55

Abstract: An image processing apparatus according to one embodiment determines target resolutions of a plurality of source images based on a first horizontal direction size and a first vertical direction size which are a horizontal direction size and a vertical direction size of a backlight control unit of a first display, and a second horizontal direction size and a second vertical direction size which are a horizontal direction size and a vertical direction size of a backlight control unit of a second display, and converts the resolution of each of a plurality of source images such that the resolution of each of a plurality of source images becomes the target resolution.

公开(公告)号：US20170094280A1

公开(公告)日：2017-03-30

申请号：US15266528

申请日：2016-09-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ren IMAOKA ,  Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Kazushi AKIE ,  Ryoji HASHIMOTO

IPC: H04N19/139 ,  H04N19/61 ,  H04N19/124 ,  H04N19/42 ,  H04N19/105 ,  H04N19/159

CPC classification number: H04N19/139 ,  H04N19/105 ,  H04N19/124 ,  H04N19/132 ,  H04N19/137 ,  H04N19/159 ,  H04N19/172 ,  H04N19/174 ,  H04N19/186 ,  H04N19/439 ,  H04N19/61

Abstract: A semiconductor device includes a hash generator, a reference hash list, a frame mode determination unit, and an intra prediction unit. The hash generator generates a hash value of a target frame to be encoded. The reference hash list is to record the hash value generated by the hash generator. The frame mode determination unit compares the hash value generated by the hash generator and the hash value in the reference hash list. The intra prediction unit performs intra prediction for the target frame to be encoded. When the hash value of the target frame to be encoded coincides with any of the hash values in the reference hash list, the intra prediction unit skips an encoding process, and outputs encoded information corresponding to any of the hash values in the reference hash list.

公开(公告)号：US20170064312A1

公开(公告)日：2017-03-02

申请号：US15206248

申请日：2016-07-09

Applicant: Renesas Electronics Corporation

Inventor： Tomohiro UNE ,  Takahiko SUGIMOTO ,  Kwangsoo PARK ,  Toshiyuki KAYA ,  Tetsuya SHIBAYAMA ,  Seiji MOCHIZUKI

IPC: H04N19/186

CPC classification number: H04N19/186 ,  H04N19/117 ,  H04N19/36 ,  H04N19/80

Abstract: Making effective use of an image encoder and an image decoder for processing a color image of a general-purpose standard bit depth, an image transmission device capable of transmitting/receiving a monochrome image of a higher bit depth is configured. An image transmission device includes an image encoder to encode a high bit-depth monochrome image and output encoded data and an image decoder to generate, by decoding the encoded data received via a transmission path, a high bit-depth monochrome image. The image encoder decomposes the input high bit-depth image data into plural bit planes corresponding to color image data of a standard bit depth and encodes the standard bit-depth color image data. The image decoder decodes the color image data of the standard bit depth and synthesizes, from the decoded standard bit-depth color image data, a high bit-depth monochrome image.

Abstract translation: 通过有效利用图像编码器和图像解码器来处理通用标准位深度的彩色图像，可以配置能够发送/接收更高位深度的单色图像的图像发送装置。 图像传输装置包括：图像编码器，用于对高位深度单色图像进行编码并输出编码数据;以及图像解码器，通过对通过传输路径接收的编码数据进行解码，生成高位深度单色图像。 图像编码器将输入的高位深度图像数据分解成与标准位深度的彩色图像数据相对应的多个位平面，并对标准位深度彩色图像数据进行编码。 图像解码器对标准位深度的彩色图像数据进行解码，并从解码的标准位深度彩色图像数据中合成高位深度单色图像。

公开(公告)号：US20190146683A1

公开(公告)日：2019-05-16

申请号：US16128310

申请日：2018-09-11

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Nhat Van HUYNH ,  Seiji MOCHIZUKI ,  Katsushige MATSUBARA ,  Toshiyuki KAYA

IPC: G06F3/06

Abstract: To provide a semiconductor device which suppresses a delay in processing. The semiconductor device is equipped with a plurality of read units which read data stored across a plurality of banks in a memory having the banks, and an access method managing section which, when one of the read units reads the data, determines a read start bank number being a bank number to start reading according to operation situations of the read units excepting the one read unit, and instructs the determined read start bank number to the one read unit.

公开(公告)号：US20170264820A1

公开(公告)日：2017-09-14

申请号：US15421503

申请日：2017-02-01

Applicant: Renesas Electronics Corporation

Inventor： Tetsuya SHIBAYAMA ,  Toshiyuki KAYA ,  Seiji MOCHIZUKI ,  Ryoji HASHIMOTO

IPC: H04N5/232 ,  H04N19/124 ,  H04N19/20

Abstract: A semiconductor device includes: an encoding processing unit that stores an encoded stream of an input data that is encoded based on the specified encoding control information; a buffer management unit that calculates the transmission buffer occupancy indicating the amount of data stored in a transmission buffer according to the generated data amount, and the reception buffer occupancy indicating the amount of data stored in a reception buffer, which is the destination of the encoded stream; and a control information specifying unit that, when the transmission buffer occupancy is equal to or less than a first threshold, specifies the encoding control information based on the reception buffer occupancy, and when the transmission buffer occupancy is greater than the first threshold, specifies the encoding control information to further reduce the generated data amount than in the case of equal to or less than the first threshold, to the encoding processing unit.

公开(公告)号：US20170257637A1

公开(公告)日：2017-09-07

申请号：US15604356

申请日：2017-05-24

Applicant: Renesas Electronics Corporation

Inventor： Katsushige MATSUBARA ,  Takayuki MATSUMI ,  Seiji MOCHIZUKI ,  Kenichi IWATA ,  Toshiyuki KAYA

IPC: H04N19/436 ,  H04N19/91 ,  G06T1/20

CPC classification number: H04N19/436 ,  G06T1/20 ,  H04N19/91

Abstract: An in-vehicle system includes a camera having an encoder encoding video obtained by the camera, an image processing apparatus which receives the encoded video from the camera, and an image recognition processing circuit performing image recognition on decoded video data from the image processing apparatus. The image processing apparatus includes a codec processing circuit which decodes the encoded video, a plurality of image processing circuits which execute tasks in parallel, an estimating circuit which estimates estimation time in which a process of the task is completed in each of the image processing circuit on the basis of the number of access times to a bus which is obtained on the basis of a parameter of decoding used in the codec processing circuit, and a scheduling circuit which schedules tasks to be executed by the plurality of image processing circuit on the basis of the estimation time.

公开(公告)号：US20170153838A1

公开(公告)日：2017-06-01

申请号：US15355322

申请日：2016-11-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Katsushige MATSUBARA ,  Seiji MOCHIZUKI ,  Ryoji HASHIMOTO ,  Toshiyuki KAYA ,  Kimihiko NAKAZAWA ,  Takahiro IRITA ,  Tetsuji TSUDA

IPC: G06F3/06 ,  G06F7/544

CPC classification number: G06F3/0638 ,  G06F3/0604 ,  G06F3/0656 ,  G06F3/0673 ,  G06F7/544 ,  G06F2207/544 ,  H04N19/423

Abstract: Disclosed is a semiconductor device capable of performing compression and decompression with increased appropriateness. The semiconductor device includes a computing module and a memory control module. The computing module includes a computing unit and a compression circuit. The computing unit performs arithmetic processing. The compression circuit compresses data indicative of the result of arithmetic processing. The memory control module includes an access circuit and a decompression circuit. The access circuit writes compressed data into a memory and reads written data from the memory. The decompression circuit decompresses data read from the memory and outputs the decompressed data to the computing module.

公开(公告)号：US20210352278A1

公开(公告)日：2021-11-11

申请号：US17380599

申请日：2021-07-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Maiki HOSOKAWA ,  Toshiyuki KAYA ,  Tetsuya SHIBAYAMA ,  Seiji MOCHIZUKI ,  Tomohiro UNE ,  Kazushi AKIE

IPC: H04N19/105 ,  H04N19/139 ,  H04N19/146 ,  H04N19/172 ,  H04N5/232

Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.

公开(公告)号：US20210089453A1

公开(公告)日：2021-03-25

申请号：US17112702

申请日：2020-12-04

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yuki HAYAKAWA ,  Toshiyuki KAYA ,  Shinichi SHIBAHARA

IPC: G06F12/0815 ,  G06F12/06 ,  G06F11/16

Abstract: A semiconductor device includes first and second CPUs, first and second SPUs for controlling a snoop operation, a controller supporting ASIL D of a functional safety standard and a memory. The controller sets permission of the snoop operation to the first and second SPUs when a software lock-step is not performed. The controller sets prohibition of the snoop operation to the first and second SPUs when the software lock-step is performed. The first CPU executes a first software for the software lock-step, and writes an execution result in a first area for the memory. The second CPU executes a second software for the software lock-step, and writes an execution result in a second area of the memory. The execution result written in the first area is compared with the execution result written in the second area.