公开(公告)号：US10128200B2

公开(公告)日：2018-11-13

申请号：US15833289

申请日：2017-12-06

Applicant: Renesas Electronics Corporation

Inventor： Kuniharu Muto ,  Ryo Kanda

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/544 ,  H01L21/78 ,  H02M7/5387 ,  H02P27/06

Abstract: A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first long side, a second side, a third short side, and a fourth short side. In a Y-direction, each of the first and second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.

公开(公告)号：US10566258B2

公开(公告)日：2020-02-18

申请号：US15969897

申请日：2018-05-03

Applicant: Renesas Electronics Corporation

Inventor： Kuniharu Muto ,  Koji Bando

IPC: H01L23/31 ,  H01L23/495 ,  H01L25/16 ,  H01L25/00 ,  H01L21/48 ,  H01L23/40 ,  H01L23/00 ,  H01L25/07 ,  H01L23/36 ,  H01L25/18 ,  H01L21/56 ,  H01L23/29

Abstract: Reliability of a semiconductor module is improved. In a resin mold step of assembly of a semiconductor module, an IGBT chip, a diode chip, a control chip, a part of each of chip mounting portions are resin molded so that a back surface of each of the chip mounting portions is exposed from a back surface of a sealing body. After the resin molding, an insulating layer is bonded to the back surface of the sealing body so as to cover each back surface (exposed portion) of the chip mounting portions, and then, a TIM layer is bonded to an insulating layer. Here, a region of the TIM layer in a plan view is included in a region of the insulating layer.

公开(公告)号：US10284109B2

公开(公告)日：2019-05-07

申请号：US15891872

申请日：2018-02-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Koji Bando ,  Kuniharu Muto ,  Hideaki Sato

IPC: H01L25/16 ,  H02M7/48 ,  H02M7/00 ,  H03K17/64 ,  H01L25/18 ,  H01L23/12

Abstract: An electronic device includes a first substrate, a wiring substrate (second substrate) disposed over the first substrate, and an enclosure (case) in which the first substrate and the wiring substrate are accommodated and that has a first side and a second side. A driver component (semiconductor component) is mounted on the wiring substrate. A gate electrode of a first semiconductor component is electrically connected to the driver component via a lead disposed on a side of the first side and a wiring disposed between the driver component and the first side. A gate electrode of a second semiconductor component is electrically connected to the driver component via a lead disposed on a side of the second side and a wiring disposed between the driver component and the second side.

公开(公告)号：US09906165B2

公开(公告)日：2018-02-27

申请号：US15194624

申请日：2016-06-28

Applicant: Renesas Electronics Corporation

Inventor： Kuniharu Muto ,  Koji Bando ,  Takamitsu Kanazawa ,  Ryo Kanda ,  Akihiro Tamura ,  Hirobumi Minegishi

IPC: H01L23/495 ,  H01L23/04 ,  H01L27/06 ,  H02M7/00 ,  H02M7/537 ,  H02M7/5387

CPC classification number: H02M7/537 ,  H01L23/04 ,  H01L23/3107 ,  H01L23/49541 ,  H01L27/0664 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/181 ,  H02M7/003 ,  H02M7/53875 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.

公开(公告)号：US11037847B2

公开(公告)日：2021-06-15

申请号：US16736052

申请日：2020-01-07

Applicant: Renesas Electronics Corporation

Inventor： Kuniharu Muto ,  Koji Bando

IPC: H01L23/31 ,  H01L23/495 ,  H01L25/16 ,  H01L25/00 ,  H01L21/48 ,  H01L23/40 ,  H01L23/00 ,  H01L25/07 ,  H01L23/36 ,  H01L25/18 ,  H01L21/56 ,  H01L23/29

Abstract: Reliability of a semiconductor module is improved. In a resin mold step of assembly of a semiconductor module, an IGBT chip, a diode chip, a control chip, a part of each of chip mounting portions are resin molded so that a back surface of each of the chip mounting portions is exposed from a back surface of a sealing body. After the resin molding, an insulating layer is bonded to the back surface of the sealing body so as to cover each back surface (exposed portion) of the chip mounting portions, and then, a TIM layer is bonded to an insulating layer. Here, a region of the TIM layer in a plan view is included in a region of the insulating layer.

公开(公告)号：US10811345B2

公开(公告)日：2020-10-20

申请号：US16410768

申请日：2019-05-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kuniharu Muto ,  Hideyuki Nishikawa

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L25/18 ,  H01L25/00 ,  H01L23/544 ,  H02M7/5387

Abstract: Assembly of the semiconductor device includes the following steps: (a) mounting a semiconductor chip on the bottom electrode 40; (b) mounting the top electrode 30 on the semiconductor chip; (c) forming a sealing body 70 made of resin and provided with a convex portion 74 so as to cover the semiconductor chip; and (d) exposing the electrode surface 31 of the top electrode 30 on the top surface of the sealing body 70 and exposing the electrode surface 41 of the bottom electrode 40 on the back surface of the sealing body 70. In the step (d), at least one of the electrode surface 31 and the electrode surface 41 is exposed from the sealing body 70 by irradiating at least one of the front surface and the back surface of the sealing body 70 with the laser 110.

公开(公告)号：US10573604B2

公开(公告)日：2020-02-25

申请号：US16151585

申请日：2018-10-04

Applicant: Renesas Electronics Corporation

Inventor： Kuniharu Muto ,  Ryo Kanda

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/544 ,  H01L21/78 ,  H02M7/5387 ,  H02P27/06 ,  H02M7/00 ,  H02M1/00

Abstract: A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first long side, a second side, a third short side, and a fourth short side. In a Y-direction, each of the first and second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.