公开(公告)号：US10475883B2

公开(公告)日：2019-11-12

申请号：US15836889

申请日：2017-12-10

Applicant: Renesas Electronics Corporation

Inventor： Masaru Kadoshima ,  Masahiko Fujisawa

IPC: H01L27/12 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L23/522 ,  H01L21/762 ,  H01L21/768 ,  H01L21/02 ,  H01L21/84 ,  H01L29/786 ,  H01L29/417

Abstract: In a semiconductor device, a width of a second epitaxial layer is greater than a width of a first epitaxial layer, and a thickness of an end portion of the second epitaxial layer, which is in contact with an element isolation portion, is smaller than a thickness of an end portion of the first epitaxial layer, which is in contact with the element isolation portion, and a second shortest distance between the element isolation portion and a second plug is greater than a first shortest distance between the element isolation portion and a first plug.

公开(公告)号：US10062773B2

公开(公告)日：2018-08-28

申请号：US14712894

申请日：2015-05-14

Applicant: Renesas Electronics Corporation

Inventor： Masaru Kadoshima ,  Masao Inoue

IPC: H01L29/739 ,  H01L29/10 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L29/7397 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/1095

Abstract: The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating.In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.

公开(公告)号：US09685565B2

公开(公告)日：2017-06-20

申请号：US14470719

申请日：2014-08-27

Applicant: Renesas Electronics Corporation

Inventor： Masaharu Mizutani ,  Masao Inoue ,  Hiroshi Umeda ,  Masaru Kadoshima

IPC: H01L29/792 ,  H01L29/51 ,  H01L29/66 ,  H01L21/28 ,  H01L21/02 ,  H01L29/423

CPC classification number: H01L29/792 ,  H01L21/02148 ,  H01L21/02178 ,  H01L21/02318 ,  H01L21/02359 ,  H01L21/28229 ,  H01L21/28282 ,  H01L29/4234 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66833

Abstract: The performance of a semiconductor device having a memory element is improved. An insulating film, which is a gate insulating film for a memory element, is formed on a semiconductor substrate, and a gate electrode for the memory element is formed on the insulating film. The insulating film has a first insulating film, a second insulating film thereon, and a third insulating film thereon. The second insulating film is a high-dielectric constant insulator film having a charge accumulating function and contains hafnium, silicon, and oxygen. Each of the first insulating film and the third insulating film has a band gap larger than the band gap of the second insulating film.

公开(公告)号：US11094833B2

公开(公告)日：2021-08-17

申请号：US16452261

申请日：2019-06-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masao Inoue ,  Masaru Kadoshima ,  Yoshiyuki Kawashima ,  Ichiro Yamakawa

IPC: H01L29/792 ,  H01L29/423 ,  H01L29/51 ,  H01L21/28 ,  H01L21/02 ,  H01L29/66

Abstract: A memory cell, which is a nonvolatile memory cell, includes a gate dielectric film having charge storage layer capable of holding charges, and a memory gate electrode formed on the gate dielectric film. The charge storage layer includes an insulating film containing hafnium, silicon, and oxygen, an insertion layer formed on the insulating film and containing aluminum, and an insulating film formed on the insertion layer and containing hafnium, silicon, and oxygen.

公开(公告)号：US11081596B2

公开(公告)日：2021-08-03

申请号：US15904601

申请日：2018-02-26

Applicant: Renesas Electronics Corporation

Inventor： Masaru Kadoshima ,  Masao Inoue

IPC: H01L29/792 ,  H01L29/423 ,  H01L21/28 ,  H01L29/66 ,  H01L27/11568 ,  H01L21/02 ,  H01L29/51

Abstract: To improve the performance of a semiconductor device, the semiconductor device includes an insulating film portion over a semiconductor substrate. The insulating film portion includes an insulating film containing silicon and oxygen, a first charge storage film containing silicon and nitrogen, an insulating film containing silicon and oxygen, a second charge storage film containing silicon and nitrogen, and an insulating film containing silicon and oxygen. The first charge storage film is included by two charge storage films.

公开(公告)号：US20180308964A1

公开(公告)日：2018-10-25

申请号：US16019047

申请日：2018-06-26

Applicant: Renesas Electronics Corporation

Inventor： Masaru Kadoshima ,  Masao Inoue

IPC: H01L29/739 ,  H01L27/092 ,  H01L29/10 ,  H01L21/8238

CPC classification number: H01L29/7397 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/1095

Abstract: The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating.In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.

公开(公告)号：US20150340479A1

公开(公告)日：2015-11-26

申请号：US14712894

申请日：2015-05-14

Applicant: Renesas Electronics Corporation

Inventor： Masaru Kadoshima ,  Masao Inoue

IPC: H01L29/739 ,  H01L29/10

CPC classification number: H01L29/7397 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/1095

Abstract: The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating.In the present invention, a first electrically conductive type epitaxial layer is formed over a first electrically conductive type base substrate. The impurity concentration of the epitaxial layer is lower than that of the base substrate. A second electrically conductive type first embedded layer and a second electrically conductive type second embedded layer are formed in the epitaxial layer. The second embedded layer is deeper than the first embedded layer, is kept away from the first embedded layer, and has an impurity concentration lower than the first embedded layer. A transistor is further formed in the epitaxial layer.

Abstract translation: 本发明在半导体器件的制造工艺中可以抑制：杂质从衬底扩散到半导体层; 并且晶体管的耐压降低。 在本发明中，在第一导电型基底上形成第一导电型外延层。 外延层的杂质浓度低于基底的杂质浓度。 第二导电型第一嵌入层和第二导电型第二嵌入层形成在外延层中。 第二嵌入层比第一嵌入层更深，远离第一嵌入层，杂质浓度低于第一嵌入层。 晶体管进一步形成在外延层中。

公开(公告)号：US20150060991A1

公开(公告)日：2015-03-05

申请号：US14470719

申请日：2014-08-27

Applicant: Renesas Electronics Corporation

Inventor： Masaharu Mizutani ,  Masao Inoue ,  Hiroshi Umeda ,  Masaru Kadoshima

IPC: H01L29/792 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/792 ,  H01L21/02148 ,  H01L21/02178 ,  H01L21/02318 ,  H01L21/02359 ,  H01L21/28229 ,  H01L21/28282 ,  H01L29/4234 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66833

Abstract: The performance of a semiconductor device having a memory element is improved. An insulating film, which is a gate insulating film for a memory element, is formed on a semiconductor substrate, and a gate electrode for the memory element is formed on the insulating film. The insulating film has a first insulating film, a second insulating film thereon, and a third insulating film thereon. The second insulating film is a high-dielectric constant insulator film having a charge accumulating function and contains hafnium, silicon, and oxygen. Each of the first insulating film and the third insulating film has a band gap larger than the band gap of the second insulating film.

Abstract translation: 提高了具有存储元件的半导体器件的性能。 作为用于存储元件的栅极绝缘膜的绝缘膜形成在半导体衬底上，并且在绝缘膜上形成用于存储元件的栅电极。 绝缘膜具有第一绝缘膜，第二绝缘膜及其上的第三绝缘膜。 第二绝缘膜是具有电荷累积功能并含有铪，硅和氧的高介电常数绝缘膜。 第一绝缘膜和第三绝缘膜中的每一个具有比第二绝缘膜的带隙大的带隙。