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公开(公告)号:US20240087996A1
公开(公告)日:2024-03-14
申请号:US18510204
申请日:2023-11-15
Applicant: ROHM CO., LTD.
Inventor: Kazuki OKUYAMA , Shuntaro TAKAHASHI , Motoharu HAGA , Shingo YOSHIDA , Kazuhisa KUMAGAI , Hajime OKUDA
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L21/765 , H01L23/00 , H01L23/31 , H01L23/34 , H01L29/40 , H01L29/66 , H01L29/78
CPC classification number: H01L23/49562 , H01L21/4825 , H01L21/565 , H01L21/765 , H01L23/3114 , H01L23/34 , H01L23/49513 , H01L23/4952 , H01L23/49582 , H01L24/48 , H01L29/407 , H01L29/66734 , H01L29/7813 , H01L2224/48245 , H01L2224/48472 , H01L2924/13091
Abstract: A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.
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公开(公告)号:US20240071877A1
公开(公告)日:2024-02-29
申请号:US18502759
申请日:2023-11-06
Applicant: ROHM CO., LTD.
Inventor: Yosui FUTAMURA , Shunya MIKAMI , Ryuta KIMURA , Kazuhisa KUMAGAI
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L23/31
CPC classification number: H01L23/49568 , H01L21/4825 , H01L21/565 , H01L23/3107 , H01L23/4952 , H01L23/49562 , H01L23/49575
Abstract: A semiconductor device includes a first semiconductor element, a first object, a sealing resin and a covering part. The first semiconductor element includes a first electrode. The first object includes a first surface facing the first electrode. The sealing resin covers the first semiconductor element and the first object. The covering part is interposed between the first electrode and the first surface and contains a material having a higher thermal conductivity than the sealing resin.
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公开(公告)号:US20250069997A1
公开(公告)日:2025-02-27
申请号:US18945218
申请日:2024-11-12
Applicant: ROHM CO., LTD.
Inventor: Kazuki OKUYAMA , Shuntaro TAKAHASHI , Motoharu HAGA , Shingo YOSHIDA , Kazuhisa KUMAGAI , Hajime OKUDA
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L21/765 , H01L23/00 , H01L23/31 , H01L23/34 , H01L29/40 , H01L29/66 , H01L29/78
Abstract: A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.
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公开(公告)号:US20210098346A1
公开(公告)日:2021-04-01
申请号:US17044658
申请日:2019-04-11
Applicant: ROHM CO., LTD.
Inventor: Kazuki OKUYAMA , Shuntaro TAKAHASHI , Motoharu HAGA , Shingo YOSHIDA , Kazuhisa KUMAGAI , Hajime OKUDA
IPC: H01L23/495 , H01L23/34 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/56 , H01L29/40 , H01L29/78 , H01L21/765 , H01L29/66
Abstract: A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.
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