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公开(公告)号：US20070105241A1
公开(公告)日：2007-05-10
申请号：US11644792
申请日：2006-12-22
IPC分类号： H01L21/00 , H01L21/8239
CPC分类号： H01L21/76852 , H01L21/76873 , H01L21/76874 , H01L21/76885 , H01L27/228 , H01L43/12
摘要： A method of forming a ferromagnetic liner on conductive lines of magnetic memory devices and a structure thereof. The ferromagnetic liner increases the flux concentration of current run through the conductive lines, reducing the amount of write current needed to switch magnetic memory cells. The conductive lines are formed in a plate-up method, and the ferromagnetic liner is selectively formed on the plated conductive lines. The ferromagnetic liner may also be formed over conductive lines and a top portion of vias in a peripheral region of the workpiece.
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公开(公告)号：US20060022286A1
公开(公告)日：2006-02-02
申请号：US10903356
申请日：2004-07-30
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L21/76852 , H01L21/76873 , H01L21/76874 , H01L21/76885 , H01L27/228 , H01L43/12
摘要： A method of forming a ferromagnetic liner on conductive lines of magnetic memory devices and a structure thereof. The ferromagnetic liner increases the flux concentration of current run through the conductive lines, reducing the amount of write current needed to switch magnetic memory cells. The conductive lines are formed in a plate-up method, and the ferromagnetic liner is selectively formed on the plated conductive lines. The ferromagnetic liner may also be formed over conductive lines and a top portion of vias in a peripheral region of the workpiece.
摘要翻译： 一种在磁存储器件的导线上形成铁磁衬垫的方法及其结构。 铁磁衬垫增加了通过导线延伸的电流的通量浓度，从而减少了切换磁存储单元所需的写入电流。 导电线以平板化方式形成，并且铁电衬里选择性地形成在镀覆的导电线上。 铁磁衬垫也可以形成在工件的外围区域中的导电线和通孔的顶部上。
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公开(公告)号：US08665629B2
公开(公告)日：2014-03-04
申请号：US11864575
申请日：2007-09-28
申请人： Human Park , Ulrich Klostermann , Rainer Leuschner
发明人： Human Park , Ulrich Klostermann , Rainer Leuschner
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , H01L27/2436 , H01L29/66795 , H01L29/785
摘要： An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell that includes a resistivity changing memory element. The resistivity changing memory element is electrically coupled to a select transistor that includes a FinFET including a source, a drain, and a fin structure formed above a surface of a substrate between the source and the drain. The fin structure includes a channel area extending in a direction substantially parallel to the surface of the substrate, and a dielectric layer formed around at least a portion of the channel area such that an effective channel width of the select transistor depends at least in part on a height of the fin structure.
摘要翻译： 对集成电路的集成电路及其制造方法进行说明。 在一个实施例中，集成电路包括包括电阻率变化存储元件的存储单元。 电阻率变化存储元件电耦合到选择晶体管，该选择晶体管包括在源极和漏极之间形成在衬底表面上方的源极，漏极和鳍状结构的FinFET。 翅片结构包括在基本上平行于衬底的表面的方向上延伸的沟道区，以及围绕沟道区的至少一部分形成的介电层，使得选择晶体管的有效沟道宽度至少部分依赖于 翅片结构的高度。
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公开(公告)号：US20110073987A1
公开(公告)日：2011-03-31
申请号：US12567551
申请日：2009-09-25
申请人： Gunther Mackh , Uwe Seidel , Rainer Leuschner
发明人： Gunther Mackh , Uwe Seidel , Rainer Leuschner
CPC分类号： H01L28/10 , H01L21/76898 , H01L23/481 , H01L23/5227 , H01L23/645 , H01L25/0657 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： Through substrate features in semiconductor substrates are described. In one embodiment, the semiconductor device includes a through substrate via disposed in a first region of a semiconductor substrate. A through substrate conductor coil is disposed in a second region of the semiconductor substrate.
摘要翻译： 描述了半导体衬底中的衬底特征。 在一个实施例中，半导体器件包括设置在半导体衬底的第一区域中的贯穿衬底通孔。 贯穿基板导体线圈设置在半导体基板的第二区域中。
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5.发明授权Integrated circuit, method of manufacturing an integrated circuit, and memory module 有权集成电路，集成电路的制造方法和存储器模块公开(公告)号：US07855435B2
公开(公告)日：2010-12-21
申请号：US12047167
申请日：2008-03-12
IPC分类号： H01L23/48
CPC分类号： H01L43/08 , G11C11/15 , G11C11/1675
摘要： According to one embodiment of the present invention, an integrated circuit including a plurality of memory cells is provided. Each memory cell includes a resistivity changing memory element which includes a top electrode, a bottom electrode, and resistivity changing material being disposed between the top electrode and the bottom electrode. Each resistivity changing memory element is at least partially surrounded by a thermal insulating structure. The thermal insulating structures are arranged such that the dissipation of heat generated within the resistivity changing memory elements into the environment of the resistivity changing memory elements is lowered.
摘要翻译： 根据本发明的一个实施例，提供了包括多个存储单元的集成电路。 每个存储单元包括电阻率变化存储元件，其包括设置在顶部电极和底部电极之间的顶部电极，底部电极和电阻率变化材料。 每个电阻率变化记忆元件至少部分地被绝热结构包围。 热绝缘结构被布置成使得在电阻率变化的存储元件内产生的热量消耗到电阻率变化存储元件的环境中降低。
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公开(公告)号：US20090085121A1
公开(公告)日：2009-04-02
申请号：US11864575
申请日：2007-09-28
申请人： Human Park , Ulrich Klostermann , Rainer Leuschner
发明人： Human Park , Ulrich Klostermann , Rainer Leuschner
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/228 , H01L27/2436 , H01L29/66795 , H01L29/785
摘要： An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell that includes a resistivity changing memory element. The resistivity changing memory element is electrically coupled to a select transistor that includes a FinFET including a source, a drain, and a fin structure formed above a surface of a substrate between the source and the drain. The fin structure includes a channel area extending in a direction substantially parallel to the surface of the substrate, and a dielectric layer formed around at least a portion of the channel area such that an effective channel width of the select transistor depends at least in part on a height of the fin structure.
摘要翻译： 对集成电路的集成电路及其制造方法进行说明。 在一个实施例中，集成电路包括包括电阻率变化存储元件的存储单元。 电阻率变化存储元件电耦合到选择晶体管，该选择晶体管包括在源极和漏极之间形成在衬底表面上方的源极，漏极和鳍状结构的FinFET。 翅片结构包括在基本上平行于衬底的表面的方向上延伸的沟道区，以及围绕沟道区的至少一部分形成的介电层，使得选择晶体管的有效沟道宽度至少部分依赖于 翅片结构的高度。
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公开(公告)号：US07122899B2
公开(公告)日：2006-10-17
申请号：US10133336
申请日：2002-04-26
IPC分类号： H01L23/45
CPC分类号： H01L23/576 , H01L28/20 , H01L29/41733 , H01L29/458 , H01L29/78618 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： An ohmic resistance is present between two parts of a conductor layer so that the size of the ohmic resistance can be ascertained and/or a semiconductor region is present in or on a layer forming the dielectric. The conductor layer is structured into a gate contact, a source contact, and a drain contact so that a transistor function or switching function is possible in the semiconductor region. Such a configuration allows an attempt to analyze the circuit integrated in the chip to be detected.
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8.发明授权Method for producing cavities with submicrometer patterns in a semiconductor device using a freezing process liquid 失效在使用冷冻处理液的半导体装置中制造具有亚微米图形的空腔的方法公开(公告)号：US06734095B2
公开(公告)日：2004-05-11
申请号：US10230774
申请日：2002-08-29
IPC分类号： H01L214763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for producing cavities, which are patterned in submicrometer dimensions, in a cavity layer of a semiconductor device, is described. In the method, a process liquid is frozen in the trenches in a process layer which has been patterned by ribs and trenches, then the process liquid is covered with a covering layer and is then expelled from the cavities resulting from the covering of the trenches.
摘要翻译： 描述了在半导体器件的空腔层中制造以亚微米尺寸图案化的空腔的方法。 在该方法中，处理液在通过肋和沟槽图案化的处理层中的沟槽中冷冻，然后处理液体被覆盖层覆盖，然后从由沟槽覆盖产生的空腔中排出。
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9.发明授权Method of discharging reaction water in PEM fuel cells and fuel cell for carrying out the method 失效在PEM燃料电池和燃料电池中排出反应水的方法，用于实施该方法公开(公告)号：US06576358B2
公开(公告)日：2003-06-10
申请号：US09822018
申请日：2001-03-30
IPC分类号： H01M804
CPC分类号： H01M8/1004 , H01M8/04156 , H01M8/04291 , H01M2300/0082
摘要： Discharging the reaction water from the novel PEM fuel cells does not require humidification of the reaction gases or an increase in the gas pressure. This is attained in that a hydrophobic layer on the cathode side is used which has a smaller pore size than the layer on the anode side. The reaction water is removed via the anode during the operation of the fuel cell.
摘要翻译： 从新型PEM燃料电池排出反应水不需要加湿反应气体或增加气体压力。 这是通过使用阴极侧的疏水层，其具有比阳极侧的层更小的孔径。 在燃料电池运行期间，反应水通过阳极被去除。
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公开(公告)号：US5851733A
公开(公告)日：1998-12-22
申请号：US793310
申请日：1997-03-12
申请人： Recai Sezi , Rainer Leuschner , Erwin Schmidt
发明人： Recai Sezi , Rainer Leuschner , Erwin Schmidt
IPC分类号： G03F7/004 , G03F7/022 , G03F7/023 , G03F7/033 , G03F7/039 , G03F7/26 , G03F7/38 , H01L21/027 , B03C5/00
CPC分类号： G03F7/265 , G03F7/0226 , G03F7/0233 , Y10S430/12
摘要： In a method for producing photolithographic patterns in the submicron range, applied on a substrate is a photoresist layer comprised of a polymer containing carboxylic acid anhydride groups and tert. butylester or tert. butoxy-carbonyloxy groups, a photoactive component--in the form of an ester of a naphthoquinonediazide-4-sulfonic acid with an aromatic or aliphatic-aromatic hydroxy compound--and a suitable solvent; the photoresist layer is then dried, exposed in an imaging manner, and subjected to a temperature treatment in the range of between 120.degree. and 150.degree. C. for a duration of 100 to 600 seconds. The photoresist layer is then subjected to a liquid silylation and is dry-developed in an anisotropic oxygen plasma.
摘要翻译： PCT No.PCT / DE95 / 01184 Sec。 371日期1997年3月12日 102（e）1997年3月12日PCT PCT 1995年9月1日PCT公布。 出版物WO96 / 08750 日期1996年3月21日在用于制造亚微米范围内的光刻图案的方法中，施加在基底上的是由包含羧酸酐基团和叔碳酸酯的聚合物组成的光致抗蚀剂层。 丁酯或叔丁酯。 萘醌二叠氮-4-磺酸与芳族或脂族 - 芳族羟基化合物的酯形式的光活性组分和合适的溶剂; 然后将光致抗蚀剂层干燥，以成像方式曝光，并在120至150℃的温度范围内进行100至600秒的持续时间。 然后将光致抗蚀剂层进行液体甲硅烷基化，并在各向异性氧等离子体中干燥显影。
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