Self-detecting optical sensors
    1.
    发明授权
    Self-detecting optical sensors 失效
    自检光学传感器

    公开(公告)号:US4505582A

    公开(公告)日:1985-03-19

    申请号:US398134

    申请日:1982-07-14

    IPC分类号: G01S17/10 G01C3/08 H01S3/00

    CPC分类号: G01S17/105

    摘要: A short-ranging laser system having an improved pulser which includes a drive pulse signal generator and a driver. The drive pulse signal generator is essentially a triggered bipolar avalanche transistor that outputs a drive pulse signal through a voltage shifting circuit to the driver. The driver is essentially two parallel-connected power MOSFETs that output a driver pulse to a GaAs heterojunction laser diode. By circuit design, the deadtime plateau is substantially reduced so that the laser return energy homodynes with the still active laser to produce a detectable output for a target within 5 meters.

    摘要翻译: 一种具有改进的脉冲发生器的短程激光系统,其包括驱动脉冲信号发生器和驱动器。 驱动脉冲信号发生器本质上是一个触发的双极雪崩晶体管,其通过电压移位电路向驱动器输出驱动脉冲信号。 驱动器基本上是两个并联连接的功率MOSFET,其将驱动脉冲输出到GaAs异质结激光二极管。 通过电路设计,死区高度大大降低,使得激光返回能量与静态激光器成为可能,以在5米内为目标产生可检测输出。

    GaAs Complementary enhancement mode junction field effect transistor
structures and method of fabrication
    2.
    发明授权
    GaAs Complementary enhancement mode junction field effect transistor structures and method of fabrication 失效
    GaAs互补增强型结场效应晶体管结构及其制造方法

    公开(公告)号:US4568957A

    公开(公告)日:1986-02-04

    申请号:US570951

    申请日:1984-01-16

    摘要: Ultra low-power GaAs complementary junction field effect transistors are implemented in the design of complementary integrated circuits using a planar technology in conjunction with multiple and selective ion implantation. Both junction FETs, namely the p and n channel devices, are enhancement mode devices and biased in the forward direction thus leading to the advantageous DCFL (directly coupled field effect transistor logic) with one power supply, low power dissipation and high packing densities, all prerequisites for VLSI (very large scale integration).

    摘要翻译: 超低功率GaAs互补结场效应晶体管在使用平面技术结合多个和选择性离子注入的互补集成电路的设计中实现。 两个结FET,即p沟道器件和n沟道器件,都是增强型器件,并且在正向上偏置,从而导致具有一个电源,低功耗和高封装密度的有利的DCFL(直接耦合场效应晶体管逻辑),全部 VLSI的先决条件(非常大规模集成)。

    Multichannel junction field-effect transistor and process
    3.
    发明授权
    Multichannel junction field-effect transistor and process 失效
    多通道结场效应晶体管及工艺

    公开(公告)号:US3967305A

    公开(公告)日:1976-06-29

    申请号:US811154

    申请日:1969-03-27

    申请人: Rainer Zuleeg

    发明人: Rainer Zuleeg

    摘要: A single gate field-effect transistor including a semi-insulating substrate for providing a one-sided device geometry, an isolating mesa formed from a layer of semi-conductor material provided on a substrate surface and which exhibits bulk negative resistance instabilities above a critical electric field strength, an extended gate structure provided in a gate region of the mesa, source and drain structures provided on the mesa at opposite sides of the gate structure, and electrical leads connected respectively to the gate, source and drain structures. The process for making the transistor, a multichannel (interdigitated structure) version, and a closed geometry (without mesa) version are also detailed.

    摘要翻译: 一种单栅极场效应晶体管,其包括用于提供单面​​器件几何形状的半绝缘衬底,由设置在衬底表面上的半导体材料层形成的隔离台面,并且在临界电极之上显示出体积负电阻不稳定性 场强度,提供在台面的栅极区域中的扩展栅极结构,设置在栅极结构的相对侧的台面上的源极和漏极结构以及分别连接到栅极,源极和漏极结构的电引线。 还详细说明了制造晶体管,多通道(叉指结构)版本以及封闭几何(无台面)版本的过程。

    Temperature tracking range finder
    4.
    发明授权
    Temperature tracking range finder 失效
    温度跟踪测距仪

    公开(公告)号:US4518255A

    公开(公告)日:1985-05-21

    申请号:US410015

    申请日:1982-08-20

    申请人: Rainer Zuleeg

    发明人: Rainer Zuleeg

    IPC分类号: G01S17/10 G01C3/08

    CPC分类号: G01S17/105

    摘要: The disclosed apparatus is a temperature tracking narrow band optical range finder which includes a prior art GaAs laser diode for emitting a laser energy pulse to a target and an improved GaAs avalanche detector for receiving a reflected pulse from the target. This range finder can be arranged in a single optical axis with the laser diode electrically shielded from the detector and the reflected pulse defocused so as to impinge on the detector area surrounding the laser diode, or it can be arranged by combining the emitted and reflected pulse in an interspersed fiber optical plane.

    摘要翻译: 所公开的装置是温度跟踪窄带光学测距仪,其包括用于向目标发射激光能量脉冲的现有技术的GaAs激光二极管和用于从目标接收反射脉冲的改进的GaAs雪崩检测器。 该测距仪可以布置在单个光轴上,激光二极管与检测器电屏蔽,反射脉冲散焦,以便撞击激光二极管周围的检测器区域,或者可以通过组合发射和反射脉冲 在散布的纤维光学平面中。

    Dual sensitivity optical sensor
    5.
    发明授权
    Dual sensitivity optical sensor 失效
    双灵敏度光学传感器

    公开(公告)号:US4366377A

    公开(公告)日:1982-12-28

    申请号:US191364

    申请日:1980-09-29

    摘要: A dual sensitivity photodetector comprising a central region comprising a relatively high sensitivity reach through avalanche photo diode and a surrounding region comprising a relatively lower sensitivity P-type intrinsic N-type photodiode is disclosed which possesses the advantages of a wide sensitivity range and a relative freedom from overload.

    摘要翻译: 公开了一种双灵敏度光电探测器,其包括通过雪崩光电二极管包括相对较高灵敏度的中心区域和包括相对较低灵敏度的P型本征N型光电二极管的周围区域,其具有宽灵敏度范围和相对自由度 从超载。

    Negative impedance transistor device
    6.
    发明授权
    Negative impedance transistor device 失效
    负阻抗晶体管器件

    公开(公告)号:US4028562A

    公开(公告)日:1977-06-07

    申请号:US587093

    申请日:1975-06-16

    申请人: Rainer Zuleeg

    发明人: Rainer Zuleeg

    摘要: Transistor device exhibiting negative resistance characteristics includes an enhancement mode insulated gate field effect transistor interacting with an integral bipolar transistor. The transistor device has a bulk region separated from a shallow substrate region by a pn-junction located in proximity to source and drain regions of the field effect transistor. The source region also serves as the emitter, the substrate region serves as the base, and the bulk region serves as the collector of the integral bipolar transistor wherein the substrate base is left floating. Normally, the collector of the bipolar transistor is connected to the gate of the field effect transistor, and a resistor of finite value is included in the gate circuit. Oscillator, astable multivibrator, gated oscillator, gated astable multivibrator, and bistable multivibrator circuits are illustratively constructed with the transistor device.

    摘要翻译: 具有负电阻特性的晶体管器件包括与整体双极晶体管相互作用的增强型绝缘栅场效应晶体管。 晶体管器件具有通过位于场效应晶体管的源极和漏极区附近的pn结与浅衬底区域分离的体区域。 源极区域还用作发射极,衬底区域用作基极,并且体区域用作整体双极晶体管的集电极,其中衬底基底悬空。 通常,双极型晶体管的集电极连接到场效应晶体管的栅极,栅极电路中包含有限值的电阻。 振荡器,不稳定的多谐振荡器,门控振荡器,门控的非稳态多谐振荡器和双稳态多谐振荡器电路用晶体管器件示意地构造。

    Method of making complementary GaAs heterojunction transistors
    8.
    发明授权
    Method of making complementary GaAs heterojunction transistors 失效
    制造互补GaAs异质结晶体管的方法

    公开(公告)号:US4746627A

    公开(公告)日:1988-05-24

    申请号:US924883

    申请日:1986-10-30

    申请人: Rainer Zuleeg

    发明人: Rainer Zuleeg

    CPC分类号: H01L21/8252

    摘要: A complementary GaAs Transistor pair is formed of a p-type MODFET and an n-type FET having an ion-implanted channel doping with a heterojunction gate. One set of structures is implemented in a planar process utilizing molecular beam epitaxy. The p-MODFET threshold voltage is determined by the thickness and doping of the p-AlGaAs layer plus the Schottky barrier height of the metal gate, and the ion implantation dosage is adjusted to give the proper threshold voltage for the enhancement mode n-channel heterojunction FET.

    摘要翻译: 互补GaAs晶体管对由p型MODFET和具有掺杂有异质结栅的离子注入沟道的n型FET形成。 一组结构在使用分子束外延的平面过程中实现。 p-MODFET阈值电压由p-AlGaAs层的厚度和掺杂加上金属栅极的肖特基势垒高度确定,并且调整离子注入剂量以给出增强模式n沟道异质结的适当阈值电压 FET。

    Method of fabrication of GaAs complementary enhancement mode junction
field effect transistor
    9.
    发明授权
    Method of fabrication of GaAs complementary enhancement mode junction field effect transistor 失效
    GaAs互补增强型结型场效应晶体管的制造方法

    公开(公告)号:US4679298A

    公开(公告)日:1987-07-14

    申请号:US771524

    申请日:1985-08-30

    摘要: Ultra low-power GaAs complementary junction field effect transistors are implemented in the design of complementary integrated circuits using a planar technology in conjunction with multiple and selective ion implantation. Both junction FETs, namely the p and n channel devices, are enhancement mode devices and biased in the forward direction thus leading to the advantageous DCFL (directly coupled field effect transistor logic) with one power supply, low power dissipation and high packing densities, all prerequisites for VLSI (very large scale integration).

    摘要翻译: 超低功率GaAs互补结场效应晶体管在使用平面技术结合多个和选择性离子注入的互补集成电路的设计中实现。 两个结FET,即p沟道器件和n沟道器件,都是增强型器件,并且在正向上偏置,从而导致具有一个电源,低功耗和高封装密度的有利的DCFL(直接耦合场效应晶体管逻辑),全部 VLSI的先决条件(非常大规模集成)。