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    Wide band gap semiconductor device including junction field effect transistor
    1.
    发明授权
    Wide band gap semiconductor device including junction field effect transistor 有权
    宽带隙半导体器件包括结场效应晶体管

    公开(公告)号：US08274086B2

    公开(公告)日：2012-09-25

    申请号：US12458968

    申请日：2009-07-28

    申请人： Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Jeremy Rashid

    发明人： Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Jeremy Rashid

    IPC分类号： H01L29/15 ,  H01L31/0256

    CPC分类号： H01L29/8083 ,  H01L29/063 ,  H01L29/0692 ,  H01L29/6609 ,  H01L29/66325 ,  H01L29/8611 ,  H01L29/872

    摘要： A wide band gap semiconductor device has a transistor cell region, a diode forming region, an electric field relaxation region located between the transistor cell region and the diode forming region, and an outer peripheral region surrounding the transistor cell region and the diode forming region. In the transistor cell region, a junction field effect transistor is disposed. In the diode forming region, a diode is disposed. In the electric field relaxation region, an isolating part is provided. The isolating part includes a trench dividing the transistor cell region and the diode forming region, a first conductivity-type layer disposed on an inner wall of the trench, and a second conductivity-type layer disposed on a surface of the first conductivity-type layer so as to fill the trench. The first conductivity-type layer and the second conductivity-type layer provide a PN junction.

    摘要翻译： 宽带隙半导体器件具有晶体管单元区域，二极管形成区域，位于晶体管单元区域和二极管形成区域之间的电场弛豫区域以及围绕晶体管单元区域和二极管形成区域的外围区域。 在晶体管单元区域中，设置结型场效应晶体管。 在二极管形成区域中，设置二极管。 在电场弛豫区域中，设置隔离部。 隔离部分包括分隔晶体管单元区域和二极管形成区域的沟槽，设置在沟槽的内壁上的第一导电类型层和设置在第一导电类型层的表面上的第二导电类型层 以填补沟槽。 第一导电型层和第二导电型层提供PN结。

    Wide band gap semiconductor device including junction field effect transistor
    2.
    发明申请
    Wide band gap semiconductor device including junction field effect transistor 有权
    宽带隙半导体器件包括结场效应晶体管

    公开(公告)号：US20100025693A1

    公开(公告)日：2010-02-04

    申请号：US12458968

    申请日：2009-07-28

    申请人： Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Jeremy Rashid

    发明人： Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Jeremy Rashid

    IPC分类号： H01L29/772 ,  H01L29/02

    CPC分类号： H01L29/8083 ,  H01L29/063 ,  H01L29/0692 ,  H01L29/6609 ,  H01L29/66325 ,  H01L29/8611 ,  H01L29/872

    摘要： A wide band gap semiconductor device has a transistor cell region, a diode forming region, an electric field relaxation region located between the transistor cell region and the diode forming region, and an outer peripheral region surrounding the transistor cell region and the diode forming region. In the transistor cell region, a junction field effect transistor is disposed. In the diode forming region, a diode is disposed. In the electric field relaxation region, an isolating part is provided. The isolating part includes a trench dividing the transistor cell region and the diode forming region, a first conductivity-type layer disposed on an inner wall of the trench, and a second conductivity-type layer disposed on a surface of the first conductivity-type layer so as to fill the trench. The first conductivity-type layer and the second conductivity-type layer provide a PN junction.

    摘要翻译： 宽带隙半导体器件具有晶体管单元区域，二极管形成区域，位于晶体管单元区域和二极管形成区域之间的电场弛豫区域以及围绕晶体管单元区域和二极管形成区域的外围区域。 在晶体管单元区域中，设置结型场效应晶体管。 在二极管形成区域中，设置二极管。 在电场弛豫区域中，设置隔离部。 隔离部分包括分隔晶体管单元区域和二极管形成区域的沟槽，设置在沟槽的内壁上的第一导电类型层和设置在第一导电类型层的表面上的第二导电类型层 以填补沟槽。 第一导电型层和第二导电型层提供PN结。

    Method for manufacturing semiconductor device having trench in silicon carbide semiconductor substrate
    3.
    发明授权
    Method for manufacturing semiconductor device having trench in silicon carbide semiconductor substrate 有权
    一种在碳化硅半导体衬底中制造具有沟槽的半导体器件的方法

    公开(公告)号：US07241694B2

    公开(公告)日：2007-07-10

    申请号：US11105587

    申请日：2005-04-14

    申请人： Yuuichi Takeuchi ,  Rajesh Kumar Malhan ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

    发明人： Yuuichi Takeuchi ,  Rajesh Kumar Malhan ,  Hiroyuki Matsunami ,  Tsunenobu Kimoto

    IPC分类号： H01L21/18 ,  H01L21/302 ,  H01L21/308

    CPC分类号： H01L29/045 ,  H01L29/66068 ,  H01L29/7828 ,  H01L29/8083

    摘要： A method for manufacturing a silicon carbide semiconductor device includes the steps of: forming a trench mask on an upper surface of a semiconductor substrate; forming the trench such that the trench having an aspect ratio equal to or larger than 2 and having a trench slanting angle equal to or larger than 80 degrees is formed; and removing a damage portion in such a manner that the damage portion disposed on an inner surface of the trench formed in the semiconductor substrate in the step of forming the trench is etched and removed in hydrogen atmosphere under decompression pressure at a temperature equal to or higher than 1600° C.

    摘要翻译： 一种制造碳化硅半导体器件的方法包括以下步骤：在半导体衬底的上表面上形成沟槽掩模; 形成沟槽，使得形成具有等于或大于2并且具有等于或大于80度的沟槽倾斜角的纵横比的沟槽; 并且以这样的方式去除损伤部分，即在形成沟槽的步骤中形成在半导体衬底的沟槽的内表面上的损伤部分在氢气气氛中在等于或等于更高的温度的减压下被蚀刻和去除 比1600℃

    Semiconductor device and method of manufacturing the same
    8.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08604540B2

    公开(公告)日：2013-12-10

    申请号：US12956152

    申请日：2010-11-30

    申请人： Rajesh Kumar Malhan ,  Naohiro Sugiyama ,  Yuuichi Takeuchi

    发明人： Rajesh Kumar Malhan ,  Naohiro Sugiyama ,  Yuuichi Takeuchi

    IPC分类号： H01L29/66 ,  H01L21/337

    CPC分类号： H01L29/808 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/8128

    摘要： A wide band gap semiconductor device having a JFET, a MESFET, or a MOSFET mainly includes a semiconductor substrate, a first conductivity type semiconductor layer, and a first conductivity type channel layer. The semiconductor layer is formed on a main surface of the substrate. A recess is formed in the semiconductor layer in such a manner that the semiconductor layer is divided into a source region and a drain region. The recess has a bottom defined by the main surface of the substrate and a side wall defined by the semiconductor layer. The channel layer has an impurity concentration lower than an impurity concentration of the semiconductor layer. The channel layer is formed on the bottom and the side wall of the recess by epitaxial growth.

    摘要翻译： 具有JFET，MESFET或MOSFET的宽带隙半导体器件主要包括半导体衬底，第一导电类型半导体层和第一导电型沟道层。 半导体层形成在基板的主表面上。 在半导体层中以半导体层被分成源极区和漏极区的方式形成凹部。 凹部具有由基板的主表面和由半导体层限定的侧壁限定的底部。 沟道层的杂质浓度低于半导体层的杂质浓度。 沟槽层通过外延生长形成在凹部的底部和侧壁上。

    Silicon carbide semiconductor device and method of manufacturing the same
    9.
    发明授权
    Silicon carbide semiconductor device and method of manufacturing the same 有权
    碳化硅半导体器件及其制造方法

    公开(公告)号：US08575648B2

    公开(公告)日：2013-11-05

    申请号：US12976116

    申请日：2010-12-22

    申请人： Yuuichi Takeuchi ,  Rajesh Kumar Malhan ,  Naohiro Sugiyama

    发明人： Yuuichi Takeuchi ,  Rajesh Kumar Malhan ,  Naohiro Sugiyama

    IPC分类号： H01L29/423 ,  H01L21/337

    CPC分类号： H01L29/0847 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828

    摘要： A silicon carbide semiconductor device having a JFET or a MOSFET includes a semiconductor substrate and a trench. The semiconductor substrate has a silicon carbide substrate, a drift layer on the silicon carbide substrate, a first gate region on the drift layer, and a source region on the first gate region. The trench has a strip shape with a longitudinal direction and reaches the drift layer by penetrating the source region and the first gate region. The trench is filled with a channel layer and a second gate region on the channel layer. The source region is not located at an end portion of the trench in the longitudinal direction.

    摘要翻译： 具有JFET或MOSFET的碳化硅半导体器件包括半导体衬底和沟槽。 半导体衬底具有碳化硅衬底，碳化硅衬底上的漂移层，漂移层上的第一栅极区域和第一栅极区域上的源极区域。 沟槽具有纵向方向的带状，并通过穿透源极区域和第一栅极区域而到达漂移层。 在沟道层上填充沟道层和第二栅极区域。 源极区域不位于沟槽的纵向方向的端部。