Silicon carbide semiconductor device and method of manufacturing the same
    1.
    发明授权
    Silicon carbide semiconductor device and method of manufacturing the same 有权
    碳化硅半导体器件及其制造方法

    公开(公告)号:US08575648B2

    公开(公告)日:2013-11-05

    申请号:US12976116

    申请日:2010-12-22

    IPC分类号: H01L29/423 H01L21/337

    摘要: A silicon carbide semiconductor device having a JFET or a MOSFET includes a semiconductor substrate and a trench. The semiconductor substrate has a silicon carbide substrate, a drift layer on the silicon carbide substrate, a first gate region on the drift layer, and a source region on the first gate region. The trench has a strip shape with a longitudinal direction and reaches the drift layer by penetrating the source region and the first gate region. The trench is filled with a channel layer and a second gate region on the channel layer. The source region is not located at an end portion of the trench in the longitudinal direction.

    摘要翻译: 具有JFET或MOSFET的碳化硅半导体器件包括半导体衬底和沟槽。 半导体衬底具有碳化硅衬底,碳化硅衬底上的漂移层,漂移层上的第一栅极区域和第一栅极区域上的源极区域。 沟槽具有纵向方向的带状,并通过穿透源极区域和第一栅极区域而到达漂移层。 在沟道层上填充沟道层和第二栅极区域。 源极区域不位于沟槽的纵向方向的端部。

    Semiconductor device and method of manufacturing the same
    2.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US08604540B2

    公开(公告)日:2013-12-10

    申请号:US12956152

    申请日:2010-11-30

    IPC分类号: H01L29/66 H01L21/337

    摘要: A wide band gap semiconductor device having a JFET, a MESFET, or a MOSFET mainly includes a semiconductor substrate, a first conductivity type semiconductor layer, and a first conductivity type channel layer. The semiconductor layer is formed on a main surface of the substrate. A recess is formed in the semiconductor layer in such a manner that the semiconductor layer is divided into a source region and a drain region. The recess has a bottom defined by the main surface of the substrate and a side wall defined by the semiconductor layer. The channel layer has an impurity concentration lower than an impurity concentration of the semiconductor layer. The channel layer is formed on the bottom and the side wall of the recess by epitaxial growth.

    摘要翻译: 具有JFET,MESFET或MOSFET的宽带隙半导体器件主要包括半导体衬底,第一导电类型半导体层和第一导电型沟道层。 半导体层形成在基板的主表面上。 在半导体层中以半导体层被分成源极区和漏极区的方式形成凹部。 凹部具有由基板的主表面和由半导体层限定的侧壁限定的底部。 沟道层的杂质浓度低于半导体层的杂质浓度。 沟槽层通过外延生长形成在凹部的底部和侧壁上。

    SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    硅碳化硅半导体器件及其制造方法

    公开(公告)号:US20110156054A1

    公开(公告)日:2011-06-30

    申请号:US12976116

    申请日:2010-12-22

    摘要: A silicon carbide semiconductor device having a JFET or a MOSFET includes a semiconductor substrate and a trench. The semiconductor substrate has a silicon carbide substrate, a drift layer on the silicon carbide substrate, a first gate region on the drift layer, and a source region on the first gate region. The trench has a strip shape with a longitudinal direction and reaches the drift layer by penetrating the source region and the first gate region. The trench is filled with a channel layer and a second gate region on the channel layer. The source region is not located at an end portion of the trench in the longitudinal direction.

    摘要翻译: 具有JFET或MOSFET的碳化硅半导体器件包括半导体衬底和沟槽。 半导体衬底具有碳化硅衬底,碳化硅衬底上的漂移层,漂移层上的第一栅极区域和第一栅极区域上的源极区域。 沟槽具有纵向方向的带状,并通过穿透源极区域和第一栅极区域而到达漂移层。 在沟道层上填充沟道层和第二栅极区域。 源极区域不位于沟槽的纵向方向的端部。

    Semiconductor device having JFET and method for manufacturing the same
    4.
    发明申请
    Semiconductor device having JFET and method for manufacturing the same 审中-公开
    具有JFET的半导体器件及其制造方法

    公开(公告)号:US20110156052A1

    公开(公告)日:2011-06-30

    申请号:US12926894

    申请日:2010-12-16

    摘要: A semiconductor device having a JFET includes: a substrate made of semi-insulating semiconductor material; a gate region in a surface portion of the substrate; a channel region disposed on and contacting the gate region; a source region and a drain region disposed on both sides of the gate region so as to sandwich the channel region, respectively; a source electrode electrically coupled with the source region; a drain electrode electrically coupled with the drain region; and a gate electrode electrically coupled with the gate region. An impurity concentration of each of the source region and the drain region is higher than an impurity concentration of the channel region.

    摘要翻译: 具有JFET的半导体器件包括:由半绝缘半导体材料制成的衬底; 在所述基板的表面部分中的栅极区域; 设置在栅区上并与其接触的沟道区; 源极区域和漏极区域,分别设置在栅极区域的两侧,以夹持沟道区域; 源极,与源极电耦合; 漏极,与漏极区电耦合; 以及与栅极区域电耦合的栅电极。 源极区域和漏极区域中的每一个的杂质浓度高于沟道区域的杂质浓度。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20110133211A1

    公开(公告)日:2011-06-09

    申请号:US12956152

    申请日:2010-11-30

    摘要: A wide band gap semiconductor device having a JFET, a MESFET, or a MOSFET mainly includes a semiconductor substrate, a first conductivity type semiconductor layer, and a first conductivity type channel layer. The semiconductor layer is formed on a main surface of the substrate. A recess is formed in the semiconductor layer in such a manner that the semiconductor layer is divided into a source region and a drain region. The recess has a bottom defined by the main surface of the substrate and a side wall defined by the semiconductor layer. The channel layer has an impurity concentration lower than an impurity concentration of the semiconductor layer. The channel layer is formed on the bottom and the side wall of the recess by epitaxial growth.

    摘要翻译: 具有JFET,MESFET或MOSFET的宽带隙半导体器件主要包括半导体衬底,第一导电类型半导体层和第一导电型沟道层。 半导体层形成在基板的主表面上。 在半导体层中以半导体层被分成源极区和漏极区的方式形成凹部。 凹部具有由基板的主表面和由半导体层限定的侧壁限定的底部。 沟道层的杂质浓度低于半导体层的杂质浓度。 沟槽层通过外延生长形成在凹部的底部和侧壁上。

    Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same
    6.
    发明授权
    Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same 有权
    具有D型JFET和E型JFET的半导体器件及其制造方法

    公开(公告)号:US08373209B2

    公开(公告)日:2013-02-12

    申请号:US12974516

    申请日:2010-12-21

    IPC分类号: H01L29/12

    摘要: A semiconductor device includes: a substrate; and depletion and enhancement mode JFETs. The depletion mode JFET includes: a concavity on the substrate; a channel layer in the concavity; a first gate region on the channel layer; first source and drain regions on respective sides of the first gate region in the channel layer; first gate, source and drain electrodes. The enhancement mode JFET includes: a convexity on the substrate; the channel layer on the convexity; a second gate region on the channel layer; second source and drain regions on respective sides of the second gate region in the channel layer; second gate, source and drain electrodes. A thickness of the channel layer in the concavity is larger than a thickness of the channel layer on the convexity.

    摘要翻译: 半导体器件包括:衬底; 以及耗尽和增强型JFET。 耗尽型JFET包括:衬底上的凹面; 凹陷中的沟道层; 沟道层上的第一栅极区; 在沟道层中的第一栅极区域的相应侧上的第一源极和漏极区域; 第一栅极,源极和漏极。 增强模式JFET包括:在衬底上的凸起; 沟道层上凸; 沟道层上的第二栅极区; 在沟道层中的第二栅极区的相应侧上的第二源极和漏极区; 第二栅极,源极和漏极。 凹槽中的沟道层的厚度大于沟槽层的厚度。

    SEMICONDUCTOR DEVICE HAVING D MODE JFET AND E MODE JFET AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE HAVING D MODE JFET AND E MODE JFET AND METHOD FOR MANUFACTURING THE SAME 有权
    具有D模式JFET和E模式JFET的半导体器件及其制造方法

    公开(公告)号:US20110156053A1

    公开(公告)日:2011-06-30

    申请号:US12974516

    申请日:2010-12-21

    摘要: A semiconductor device includes: a substrate; and depletion and enhancement mode JFETs. The depletion mode JFET includes: a concavity on the substrate; a channel layer in the concavity; a first gate region on the channel layer; first source and drain regions on respective sides of the first gate region in the channel layer; first gate, source and drain electrodes. The enhancement mode JFET includes: a convexity on the substrate; the channel layer on the convexity; a second gate region on the channel layer; second source and drain regions on respective sides of the second gate region in the channel layer; second gate, source and drain electrodes. A thickness of the channel layer in the concavity is larger than a thickness of the channel layer on the convexity.

    摘要翻译: 半导体器件包括:衬底; 以及耗尽和增强型JFET。 耗尽型JFET包括:衬底上的凹面; 凹陷中的沟道层; 沟道层上的第一栅极区; 在沟道层中的第一栅极区域的相应侧上的第一源极和漏极区域; 第一栅极,源极和漏极。 增强模式JFET包括:在衬底上的凸起; 沟道层上凸; 沟道层上的第二栅极区; 在沟道层中的第二栅极区的相应侧上的第二源极和漏极区; 第二栅极,源极和漏极。 凹槽中的沟道层的厚度大于沟槽层的厚度。

    Method of producing silicon carbide single crystal
    10.
    发明授权
    Method of producing silicon carbide single crystal 失效
    生产碳化硅单晶的方法

    公开(公告)号:US5964944A

    公开(公告)日:1999-10-12

    申请号:US820888

    申请日:1997-03-21

    摘要: An easy and low-cost method of producing a large-size and high-purity silicon carbide (SiC) single crystal includes reacting silicon vapor directly with a carbon-containing compound gas under a heated atmosphere (growth space 14) to grow a silicon carbide single crystal (15) on a silicon carbide seed crystal (12), in which the silicon vapor generated from molten silicon (13) is used as a silicon vapor source, and a hydrocarbon gas (9) (e.g., propane gas) is used as the carbon-containing compound gas.

    摘要翻译: 制造大尺寸和高纯度碳化硅(SiC)单晶的简单且低成本的方法包括在加热的气氛(生长空间14)下使硅蒸气与含碳化合物气体直接反应,以生长碳化硅 使用从熔融硅(13)产生的硅蒸气作为硅蒸气源的碳化硅晶种(12)上的单晶(15),使用烃气(9)(例如丙烷气) 作为含碳化合物气体。