公开(公告)号：US08009192B2

公开(公告)日：2011-08-30

申请号：US11435703

申请日：2006-05-17

申请人： Ramesh Raskar ,  Hideaki Nii ,  Jay W. Summet ,  Yong Zhao ,  Paul H. Dietz ,  Jonathan Westhues ,  Michael Noland ,  Erich Bruns ,  Shree Nayar ,  Vlad Branzoi

发明人： Ramesh Raskar ,  Hideaki Nii ,  Jay W. Summet ,  Yong Zhao ,  Paul H. Dietz ,  Jonathan Westhues ,  Michael Noland ,  Erich Bruns ,  Shree Nayar ,  Vlad Branzoi

IPC分类号： H04N7/18 ,  H04N5/222 ,  G02B13/16 ,  G06K19/06 ,  H04N5/225

CPC分类号： G01J1/42 ,  G01N21/55 ,  G01N2021/557 ,  G06K9/2036 ,  G06K9/3216 ,  G06K2009/3225 ,  G06T7/73 ,  G06T2207/10016 ,  G06T2207/30204

摘要： An optical receiver is arranged at a location in a scene. The optical receiver includes a photo sensor configured to detect spatio-temporal modulated optical signals directed at the scene from a set of spatially dispersed optical transmitters, and to convert the optical signals from each of the optical transmitters to a corresponding electronic signal. The electronic signals can be analyzed to determine geometric properties of the location in the scene.

摘要翻译： 光接收器布置在场景中的位置。 光接收器包括光传感器，其被配置为从一组空间分散的光发射器检测针对场景的时空调制光信号，并将来自每个光发射机的光信号转换成相应的电子信号。 可以分析电子信号以确定场景中的位置的几何特性。

公开(公告)号：US20070268363A1

公开(公告)日：2007-11-22

申请号：US11435703

申请日：2006-05-17

申请人： Ramesh Raskar ,  Hideaki Nii ,  Jay W. Summet ,  Yong Zhao ,  Paul H. Dietz ,  Jonathan Westhues ,  Michael Noland ,  Erich Bruns ,  Shree Nayar ,  Vlad Branzoi

发明人： Ramesh Raskar ,  Hideaki Nii ,  Jay W. Summet ,  Yong Zhao ,  Paul H. Dietz ,  Jonathan Westhues ,  Michael Noland ,  Erich Bruns ,  Shree Nayar ,  Vlad Branzoi

IPC分类号： H04N7/18 ,  G08B19/00 ,  G08B23/00

CPC分类号： G01J1/42 ,  G01N21/55 ,  G01N2021/557 ,  G06K9/2036 ,  G06K9/3216 ,  G06K2009/3225 ,  G06T7/73 ,  G06T2207/10016 ,  G06T2207/30204

摘要： An optical receiver is arranged at a location in a scene. The optical receiver includes a photo sensor configured to detect spatio-temporal modulated optical signals directed at the scene from a set of spatially dispersed optical transmitters, and to convert the optical signals from each of the optical transmitters to a corresponding electronic signal. The electronic signals can be analyzed to determine geometric properties of the location in the scene.

摘要翻译： 光接收器布置在场景中的位置。 光接收器包括光传感器，其被配置为从一组空间分散的光发射器检测针对场景的时空调制光信号，并将来自每个光发射机的光信号转换成相应的电子信号。 可以分析电子信号以确定场景中的位置的几何特性。

公开(公告)号：US20070268366A1

公开(公告)日：2007-11-22

申请号：US11495946

申请日：2006-07-28

申请人： Ramesh Raskar ,  Hideaki Nii

发明人： Ramesh Raskar ,  Hideaki Nii

IPC分类号： H04N7/18 ,  H04N5/33

CPC分类号： G01J1/42 ,  G01N21/55 ,  G01N2021/557 ,  G01S5/16 ,  G06K9/2036 ,  G06K9/3216 ,  G06K2009/3225 ,  G06T7/73 ,  G06T2207/10016 ,  G06T2207/30204 ,  H04N5/222 ,  H04N5/2256 ,  H04N5/33

摘要： An optical emitter and an optical sensor are arranged at locations in a scene. A physical mask is arranged between the emitter and sensor to modulate directional electromagnetic signals from the emitter spatially. The modulated signals are analyzed to determine geometric properties at the location in the scene.

摘要翻译： 光发射器和光学传感器布置在场景中的位置处。 在发射器和传感器之间布置物理掩模，以调制来自发射器的定向电磁信号在空间上。 分析调制信号以确定场景中位置的几何特性。

公开(公告)号：US20070268481A1

公开(公告)日：2007-11-22

申请号：US11435581

申请日：2006-05-17

申请人： Ramesh Raskar ,  Hideaki Nii ,  Yong Zhao ,  Paul H. Dietz ,  Erich Bruns

发明人： Ramesh Raskar ,  Hideaki Nii ,  Yong Zhao ,  Paul H. Dietz ,  Erich Bruns

IPC分类号： G01J1/42 ,  G01N21/47

CPC分类号： G01N21/55 ,  G01J1/42 ,  G01N2021/557 ,  G06T7/73 ,  G06T2207/10016 ,  G06T2207/30204

摘要： A system measures reflectance in a scene. A first optical sensor is configured to measure incident energy at a location in a scene. A second optical sensor is configured to measure reflected energy from the location in the scene. The incident energy and the reflected energy are analyzed to determine a photometric property at the location of the scene.

摘要翻译： 系统测量场景中的反射率。 第一光学传感器被配置成测量场景中的位置处的入射能量。 第二光学传感器被配置为测量来自场景中的位置的反射能量。 分析入射能量和反射能量以确定场景位置处的光度特性。

公开(公告)号：US5434440A

公开(公告)日：1995-07-18

申请号：US68529

申请日：1993-05-28

申请人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata

发明人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata

IPC分类号： H01L21/033 ,  H01L21/225 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/6659 ,  H01L21/0338 ,  H01L21/2255 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/823814 ,  H01L27/0928 ,  H01L29/0847 ,  H01L29/41783 ,  H01L29/42376 ,  H01L29/66492 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7833 ,  Y10S257/90 ,  Y10S438/965

摘要： A diffused layer serves as a source and a drain. It is formed comprised of a deep first diffused layer and a shallow second diffused layer positioned between the first diffused layer and the channel region. In the second diffused region, a distribution in a depth direction of carriers has a profile in which the concentration is more than 5.times.10.sup.18 cm.sup.-3 at the peak and is in correspondence with a carrier concentration of the semiconductor substrate at a depth less than 0.04 .mu.m. Since the second diffused layer has a high concentration, the short-channel effect can be suppressed. As the second diffused region, a solid phase diffusion source such as an impurity doped silicate glass is used.

摘要翻译： 扩散层用作源极和漏极。 其形成包括位于第一扩散层和沟道区之间的深第一扩散层和浅第二扩散层。 在第二扩散区域中，载流子深度方向的分布具有在峰值处浓度大于5×10 18 cm -3的轮廓，并且与深度小于0.04μm的半导体衬底的载流子浓度相对应 m。 由于第二扩散层具有高浓度，所以可以抑制短沟道效应。 作为第二扩散区域，使用诸如杂质掺杂硅酸盐玻璃的固相扩散源。

公开(公告)号：US20050131617A1

公开(公告)日：2005-06-16

申请号：US10985967

申请日：2004-11-12

申请人： Hideaki Nii ,  Ichiro Kawabuchi

发明人： Hideaki Nii ,  Ichiro Kawabuchi

IPC分类号： G06G7/70 ,  G08C15/00 ,  G08C15/06 ,  G08C19/00 ,  H04L12/28

CPC分类号： G08C15/06

摘要： A data collecting system includes a data collecting device and plural data processing devices connected to the data collecting device by a cascade connection. For example, each of the data processing devices individually executes an A/D conversion and other data process, and adds data obtained by the data process to a data transmitting signal to transmit it to the subsequent cascade-connection data processing device in sequence. The data processing device at the head of the cascade connection generates the data transmitting signal including a data processing period and a communication period, and transmits it to the subsequent data processing device. Each of the data processing devices executes the data process in the data processing period, and transmits data obtained by the data process to the subsequent data processing device in the communication period on the basis of the data transmitting signal.

摘要翻译： 数据采集​​系统包括数据采集装置和通过级联连接连接到数据采集装置的多个数据处理装置。 例如，每个数据处理装置分别执行A / D转换和其他数据处理，并且将通过数据处理获得的数据附加到数据发送信号，以将其依次发送到后续级联连接数据处理装置。 级联连接头部的数据处理装置生成包含数据处理期间和通信期间的数据发送信号，发送给后续的数据处理装置。 数据处理装置中的每一个在数据处理期间执行数据处理，并且根据数据发送信号将通过数据处理获得的数据发送到通信期间的后续数据处理装置。

公开(公告)号：US06633069B2

公开(公告)日：2003-10-14

申请号：US09081613

申请日：1998-05-20

申请人： Hideaki Nii ,  Chihiro Yoshino

发明人： Hideaki Nii ,  Chihiro Yoshino

IPC分类号： H01L2976

CPC分类号： H01L21/8249 ,  H01L29/41708

摘要： A bipolar transistor has metal silicide as a base lead-out electrode instead of conventional polysilicon, and the metal silicide film extends to an edge of an etching stopper layer, to reduce an emitter resistance and restrain an occurrence of an emitter plug effect. Such bipolar transistor can be utilized in a CMOS semiconductor device. In this case, (1) commonly using a process of providing an active base region, a base lead-out electrode and a collector lead-out electrode of the bipolar transistor and a process of providing gate electrodes a MOS field effect transistor, (2) commonly using a process of adding a p-type impurity into the active base region and the base lead-out electrode and a process of executing an ion-implantation for providing high-concentration impurity diffused layers of pMOS transistors, (3) commonly using a process of providing an etching stopper layer and a process of providing side wall insulating films of gate electrodes, and (4) commonly using a silicidation process of the base lead-out electrode and the collector lead-out electrode and a silicidation process of electrodes of MOS transistors. In other embodiment of the bipolar transistor, a single insulating film exist between the base layer and the emitter electrode in the peripheral of the emitter opening. By this construction, the etching stopper film is not necessary resulting in reducing the base resistance.

摘要翻译： 双极晶体管具有金属硅化物作为基极引出电极而不是常规的多晶硅，并且金属硅化物膜延伸到蚀刻停止层的边缘，以降低发射极电阻并抑制发射极插塞效应的发生。 这种双极晶体管可以用在CMOS半导体器件中。 在这种情况下，（1）通常使用提供有源基极区域的工艺，双极晶体管的基极引出电极和集电极引出电极以及提供栅电极MOS场效应晶体管的工艺（2 ）通常使用将p型杂质添加到有源基极区域和基极引出电极中的过程以及执行用于提供pMOS晶体管的高浓度杂质扩散层的离子注入的过程，（3）通常使用 提供蚀刻停止层的工艺和提供栅电极的侧壁绝缘膜的工艺，以及（4）通常使用基极引出电极和集电极引出电极的硅化工艺和电极的硅化工艺 的MOS晶体管。 在双极晶体管的另一个实施例中，在发射极开口周边的基极层和发射极之间存在单个绝缘膜。 通过这种结构，不需要蚀刻阻挡膜，导致降低基极电阻

公开(公告)号：US5698881A

公开(公告)日：1997-12-16

申请号：US353240

申请日：1994-12-02

申请人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata ,  Tatsuya Ooguro ,  Claudio Fiegna

发明人： Takashi Yoshitomi ,  Masanobu Saito ,  Hisayo Momose ,  Hiroshi Iwai ,  Yukihiro Ushiku ,  Mizuki Ono ,  Yasushi Akasaka ,  Hideaki Nii ,  Satoshi Matsuda ,  Yasuhiro Katsumata ,  Tatsuya Ooguro ,  Claudio Fiegna

IPC分类号： H01L21/033 ,  H01L21/225 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423 ,  H01L29/76

CPC分类号： H01L29/6659 ,  H01L21/0338 ,  H01L21/2255 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/823814 ,  H01L27/0928 ,  H01L29/0847 ,  H01L29/42376 ,  H01L29/66628

摘要： A MOS type semiconductor device has a gate whose length is 170 nm (0.17 .mu.m) or less, a junction depth of source and drain diffusion layers in the vicinity of a channel is 22 nm or less, and a concentration of impurities at the surface in the source and drain diffusion layers is made to 10.sup.20 cm.sup.-3 or more. Such structure is obtained using solid phase diffusion using heat range from 950.degree. C. to 1050.degree. C. and/or narrowing gate width by ashing or etching. The other MOS type semiconductor device is characterized in that the relationship between the junction depth x.sub.j �nm! in the source and drain diffusion layer regions and the effective channel length L.sub.eff �nm! is determined by L.sub.eff >0.69 x.sub.j -6.17.

摘要翻译： MOS型半导体器件具有长度为170nm（0.17μm）以下的栅极，沟道附近的源极和漏极扩散层的结深度为22nm以下，表面上的杂质浓度 在源极和漏极扩散层中形成1020cm-3以上。 这种结构使用从950℃到1050℃的热范围的固相扩散和/或通过灰化或蚀刻使栅极宽度变窄来获得。 其他MOS型半导体器件的特征在于源极和漏极扩散层区域中的结深度xj [nm]与有效沟道长度Leff [nm]之间的关系由Leff> 0.69×j-6.17确定。

公开(公告)号：US06566713B2

公开(公告)日：2003-05-20

申请号：US09963426

申请日：2001-09-27

申请人： Hideaki Nii

发明人： Hideaki Nii

IPC分类号： H01L2701

CPC分类号： H01L21/743 ,  H01L21/84 ,  H01L27/1203

摘要： A semiconductor device comprises an SOI substrate formed with a mono-crystalline semiconductor layer through an embedded insulating layer on a first conductivity type semiconductor substrate; a MIS type field-effect transistor provided within a device region defined by isolating said mono-crystalline semiconductor layer with a device isolation region and having a gate electrode; an opening formed penetrating said device isolation region and said embedded insulating layer and reaching said semiconductor substrate; and a substrate electrode provided covering said opening and taken out up to the surface flush with said gate electrode. And a method of manufacturing a semiconductor device, comprises providing a device isolation region for defining a device region on a mono-crystalline semiconductor layer of an SOI substrate formed with a mono-crystalline semiconductor layer through an embedded insulation payer on a semiconductor substrate of a first conductivity type; forming an opening penetrating said device isolation region and said embedded insulation layer and reaching said semiconductor substrate; depositing polysilicon on said SOI substrate and within said opening and providing a gate electrode and a substrate electrode of said MIS type field-effect transistor by executing the patterning thereon; and implanting impurities into said gate electrode and said substrate electrode.

公开(公告)号：US06174779B1

公开(公告)日：2001-01-16

申请号：US09267775

申请日：1999-03-15

申请人： Tomoaki Shino ,  Takashi Yamada ,  Makoto Yoshimi ,  Shigeru Kawanaka ,  Hideaki Nii ,  Kazumi Inoh ,  Tsuneaki Fuse ,  Sadayuki Yoshitomi ,  Mamoru Terauchi

发明人： Tomoaki Shino ,  Takashi Yamada ,  Makoto Yoshimi ,  Shigeru Kawanaka ,  Hideaki Nii ,  Kazumi Inoh ,  Tsuneaki Fuse ,  Sadayuki Yoshitomi ,  Mamoru Terauchi

IPC分类号： H01L218228

CPC分类号： H01L29/66265 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/7317

摘要： In a lateral bipolar transistor, its emitter region, base region, link base region, and so forth, are made in self alignment with side walls of masks by using partly overlapping two mask patterns. Therefore, not relying on the mask alignment accuracy, these regions are made in a precisely controlled positional relation. Thus, the lateral bipolar transistor, thus obtained, is reduced in parasitic resistance of the base and parasitic junction capacitance between the emitter and the base, and alleviated in variance of characteristics caused by fluctuation of the length of a link base region, length of the emitter-base junction and relative positions of the emitter and the collector, and can be manufactured with a high reproducibility.

摘要翻译： 在横向双极晶体管中，通过使用部分重叠的两个掩模图案，其发射极区域，基极区域，链路基极区域等与掩模的侧壁自对准。 因此，不依赖于掩模对准精度，这些区域被精确控制位置关系。 因此，如此获得的横向双极晶体管的基极的寄生电阻和发射极与基极之间的寄生结电容减小，并且由于链路基极区域的长度的波动引起的特性的变化减轻， 发射极 - 基极结和发射极和集电极的相对位置，并且可以以高再现性制造。