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1.发明授权Method and apparatus for a monolithic integrated MESFET and p-i-n optical receiver 失效单片集成MESFET和p-i-n光接收机的方法和装置公开(公告)号：US06429499B1
公开(公告)日：2002-08-06
申请号：US09573748
申请日：2000-05-18
IPC分类号： H01L31075
CPC分类号： H01L31/105 , H01L27/1443 , H01L31/03529 , Y02E10/50
摘要： Disclosed is a semiconductor structure and manufacturing process for making an integrated FET and photodetector optical receiver on a semiconductor substrate. A FET is formed by forming at least one p region in a p-well of the substrate and forming at least one n region in the p-well of the substrate. A p-i-n photodetector is formed in the substrate by forming at least one p region in an absorption region of the substrate when forming the at least one p region in the p well of the FET and forming at least one n region in the absorption region of the substrate when forming the at least one n region in the p-well of the FET.
摘要翻译： 公开了用于在半导体衬底上制造集成的FET和光电检测器光接收器的半导体结构和制造工艺。 通过在衬底的p阱中形成至少一个p区并在衬底的p阱中形成至少一个n区形成FET。 当在FET的p阱中形成至少一个p区域并且在该阱的吸收区域中形成至少一个n区域时，通过在衬底的吸收区域中形成至少一个p区域而在衬底中形成引脚光电探测器 当在FET的p阱中形成至少一个n区时，衬底。
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2.发明授权Method and apparatus for a monolithic integrated mesfet and p-i-n optical receiver 失效单片集成滤波器和p-i-n光接收机的方法和装置公开(公告)号：US06673645B2
公开(公告)日：2004-01-06
申请号：US10142093
申请日：2002-05-08
IPC分类号： H01L2100
CPC分类号： H01L31/105 , H01L27/1443 , H01L31/03529 , Y02E10/50
摘要： Disclosed is a semiconductor structure and manufacturing process for making an integrated FET and photodetector optical receiver on a semiconductor substrate. A FET is formed by forming at least one p channel in a p-well of the substrate and forming at least one n channel in the p-well of the substrate. A p-i-n photodetector is formed in the substrate by forming at least one p channel in an absorption region of the substrate when forming the at least one p channel in the p well of the FET and forming at least one n channel in the absorption region of the substrate when forming the at least one n channel in the p-well of the FET.
摘要翻译： 公开了用于在半导体衬底上制造集成的FET和光电检测器光接收器的半导体结构和制造工艺。 通过在基板的p阱中形成至少一个p沟道并在衬底的p阱中形成至少一个n沟道而形成FET。 当在FET的p阱中形成至少一个p沟道并且在该阱的吸收区域中形成至少一个n沟道时，通过在衬底的吸收区域中形成至少一个p沟道而在衬底中形成pin光电检测器 在FET的p阱中形成至少一个n沟道时的衬底。
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3.发明授权公开(公告)号：US06489850B2
公开(公告)日：2002-12-03
申请号：US09810133
申请日：2001-03-16
IPC分类号： H03F314
CPC分类号： H01L27/0805 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The capacitors are configured so as to substantially equalize like sense and unlike sense coupling between adjacent channels, leading to cancellation of crosstalk signals.
摘要翻译： 多通道并行IC放大器包括形成在IC基板上的多个放大电路。 每个放大器电路经由一对电容器耦合到相应的输入端。 这些电容器被配置成基本上相等于相邻通道之间的相似感测和不同的感测耦合，导致消除串扰信号。
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4.发明授权Fully balanced transimpedance amplifier for high speed and low voltage applications 失效用于高速和低电压应用的全平衡跨阻放大器公开(公告)号：US06433638B1
公开(公告)日：2002-08-13
申请号：US09655816
申请日：2000-09-06
IPC分类号： H03F345
CPC分类号： H03F3/082 , H03F1/226 , H03F3/45376 , H03F2203/45394 , H03F2203/45511 , H03F2203/45518 , H03F2203/45528 , H03F2203/45652 , H03F2203/45711
摘要： A fully balanced transimpedance amplifier for high speed and low voltage applications is provided. An input stage of the amplifier uses a matched pair of common source connected transistors with sources tied directly to ground to eliminate the Vds overhead usually found in differential pairs. The ground connection minimizes a source resistance noise component, while matching minimizes power supply noise generation and susceptibility for an array of amplifiers. Feedback resistors along with diode connected MESFETS determine the transimpedance of the amplifier. The nonlinearity of diodes helps to soften clipping. Transresistance also determined the noise generated by the amplifier, and the diode connected MESFETS offer lower noise than resistors for the same impedance. Stability is achieved through use of only a single stage of gain in a loop of the input stage, while additional gain is achieved through cascading in the input stage. A differential stage minimizes any difference in amplitude between two sides of the amplifier input stage. Two stages of source followers provide buffering to drive a relatively low impedance load at the output of the amplifier. Single integrated capacitor coupling, for high bandwidth, low noise, low voltage operation with an integrated detector is provided.
摘要翻译： 提供了用于高速和低电压应用的完全平衡的跨阻抗放大器。 放大器的输入级使用一对公共源极连接的晶体管，源极直接与地相连，以消除通常在差分对中发现的Vds开销。 接地连接最小化源电阻噪声分量，同时匹配可最大限度地减少放大器阵列的电源噪声产生和敏感性。 反馈电阻和二极管连接的MESFETS决定了放大器的跨导阻抗。 二极管的非线性有助于软化削波。 Transresistance还确定了放大器产生的噪声，并且连接的二极管MESFETS的阻抗比同一阻抗的电阻低。 通过在输入级的环路中仅使用单级增益实现稳定性，而在输入级中通过级联实现附加增益。 差分级使放大器输入级两侧之间的幅度差异最小化。 源级跟随器的两级提供缓冲以在放大器的输出处驱动相对较低的阻抗负载。 提供单集成电容耦合，用于高带宽，低噪声，低电压操作与集成检测器。
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公开(公告)号：US06574091B2
公开(公告)日：2003-06-03
申请号：US10218789
申请日：2002-08-14
IPC分类号： H01G438
CPC分类号： H01L27/0805 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The capacitors are configured so as to substantially equalize like sense and unlike sense coupling between adjacent channels, leading to cancellation of crosstalk signals.
摘要翻译： 多通道并行IC放大器包括形成在IC基板上的多个放大电路。 每个放大器电路经由一对电容器耦合到相应的输入端。 这些电容器被配置成基本上相等于相邻通道之间的相似感测和不同的感测耦合，导致消除串扰信号。
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公开(公告)号：US5193036A
公开(公告)日：1993-03-09
申请号：US591910
申请日：1990-10-02
CPC分类号： G11B19/20 , G11B19/02 , G11B21/083
摘要： A transducer head skew arrangement used in a multiple disk drive data storage system is provided. The disk drive unit includes a plurality of magnetic disk surfaces mounted for simultaneous rotation about an axis. A first sequence of servo information tracks are arrayed on a dedicated servo disk surface. At least one servo reference track is written on each data disk surface for storing servo reference information. The servo reference track is written on a first data disk surface aligned with a predefined servo information track on the dedicated servo disk surface. Then servo reference tracks are sequentially written on each successive consecutive data disk surface progressively offset radially from the last written servo reference track. A plurality of data information tracks for storing data are disposed at predetermined positions relative to the servo reference track on each the data disk surface. A servo transducer head is mounted for movement in a radial direction across the first dedicated servo information for reading servo information; and a plurality of data transducer heads are mounted for movement with the servo transducer head in a radial direction across the disk surfaces for reading the servo reference tracks and for reading and/or writing data to the data information tracks. The distance moved by transducer heads for a cylinder switch is the same distance moved for each head switch, so that track-to-track seek time is minimized without requiring any additional time delay for each head switch. An overall data transfer rate increases for every data transfer accessing more than one data cylinder.
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7.发明授权Detector for short wave fiber optic communications with compensation to reduce detector jitter 有权用于短波光纤通信的检测器，具有补偿功能，可减少检测器抖动公开(公告)号：US06919550B2
公开(公告)日：2005-07-19
申请号：US09994229
申请日：2001-11-27
IPC分类号： H04B10/158 , H01J40/14
CPC分类号： H04B10/69
摘要： A detector is provided for short wave fiber optic communication having compensation to reduce detector jitter. The detector includes a photodetector providing a modulated current. A transimpedance amplifier is coupled to the photodetector receiving the modulated current and providing an output voltage signal. An output buffer is coupled to the transimpedance amplifier receiving the output voltage signal. The output buffer includes a differential transistor pair; a pair of source degeneration resistors connected to the differential transistor pair; and a capacitor coupled between connections of the differential transistor pair and the source degeneration resistors. The value of the capacitor coupled between connections of the differential transistor pair and the source degeneration resistors is selected to reduce jitter. The capacitor passes high slew rate transimpedance amplifier output voltage signals more readily than low slew rate transimpedance amplifier output voltage signals. The effect of the capacitor is to bypass the gain limiting effects of the source degeneration resistors. As a result the differential transistor pair accentuates high slew rates over lower ones so that detector jitter is reduced.
摘要翻译： 为具有补偿以减少检测器抖动的短波光纤通信提供检测器。 检测器包括提供调制电流的光电检测器。 跨阻放大器耦合到接收调制电流并提供输出电压信号的光电检测器。 输出缓冲器耦合到接收输出电压信号的跨阻抗放大器。 输出缓冲器包括差分晶体管对; 连接到差分晶体管对的一对源极退化电阻; 以及耦合在差分晶体管对和源极退化电阻器的连接之间的电容器。 选择耦合在差分晶体管对的连接和源极退化电阻之间的电容器的值以减少抖动。 电容器比低转换速率跨阻放大器输出电压信号更容易地传递高压摆率跨阻放大器输出电压信号。 电容器的作用是绕过源极退化电阻的增益限制效应。 结果是，差分晶体管对突出了较低的压摆率，从而降低了检测器抖动。
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公开(公告)号：US06985674B2
公开(公告)日：2006-01-10
申请号：US09995108
申请日：2001-11-27
IPC分类号： H04B10/156
CPC分类号： G01M11/30 , G02B6/4249
摘要： A fiber optic transceiver array and a fiber optic transceiver channel are provided for short wave fiber optic communications. A fiber optic transceiver array for short wave fiber optic communications includes a series of fiber optic transceiver channels. Each fiber optic transceiver channel includes a plurality of test pads. A power distribution bypass capacitor is distributed along the series of fiber optic transceiver channels. A plurality of high voltage power supply and ground connections are coupled through the power distribution bypass capacitor and distributed around the series of fiber optic transceiver channels. A threaded high voltage power supply connection is provided to alternating ones of the series of fiber optic transceiver channels. A threaded ground connection is provided to alternating other ones of the series of fiber optic transceiver channels to reduce power noise generation and susceptibility to noise between adjacent channels. A power to ground decoupling capacitor included with each fiber optic transceiver channel also enhances power noise sensitivity reduction. A fiber optic transceiver channel for short wave fiber optic communications includes at least a high voltage power supply connection and a ground connection. A plurality of test pads includes at least a ground connection and a pair of differential output connections. A channel decoupling capacitor is positioned proximate to the pair of differential output connections.
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公开(公告)号：US07076178B2
公开(公告)日：2006-07-11
申请号：US11137278
申请日：2005-05-25
IPC分类号： H04B10/156
CPC分类号： G01M11/30 , G02B6/4249
摘要： A fiber optic transceiver array and a fiber optic transceiver channel are provided for short wave fiber optic communications. A fiber optic transceiver array for short wave fiber optic communications includes a series of fiber optic transceiver channels. Each fiber optic transceiver channel includes a plurality of test pads. A power distribution bypass capacitor is distributed along the series of fiber optic transceiver channels. A plurality of high voltage power supply and ground connections are coupled through the power distribution bypass capacitor and distributed around the series of fiber optic transceiver channels. A threaded high voltage power supply connection is provided to alternating ones of the series of fiber optic transceiver channels. A threaded ground connection is provided to alternating other ones of the series of fiber optic transceiver channels to reduce power noise generation and susceptibility to noise between adjacent channels. A power to ground decoupling capacitor included with each fiber optic transceiver channel also enhances power noise sensitivity reduction. A fiber optic transceiver channel for short wave fiber optic communications includes at least a high voltage power supply connection and a ground connection. A plurality of test pads includes at least a ground connection and a pair of differential output connections. A channel decoupling capacitor is positioned proximate to the pair of differential output connections.
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公开(公告)号：US06515550B2
公开(公告)日：2003-02-04
申请号：US09852494
申请日：2001-05-10
IPC分类号： H03L300
摘要： A ring oscillator, such as a bipolar ring oscillator with enhanced, fast startup and shutdown includes a series of a plurality of inverting differential stages connected in a loop. The plurality of inverting differential stages includes a first multiplexer stage. The first multiplexer stage includes a first signal input, a second signal input and a select input. An oscillator feedback signal is applied to the first signal input of the first multiplexer stage. A startup circuit is coupled to the first multiplexer stage. The startup circuit includes a differential signal coupled to the second signal input of the first multiplexer stage for starting the bipolar ring oscillator. The startup circuit applies a full differential switching voltage signal to the second signal input of the first multiplexer stage to guarantee start of the bipolar ring oscillator after one delay of the series of the plurality of inverting differential stages connected in the loop. The startup circuit includes a fast transition run signal and a multiplexer select signal responsive to the run signal. The multiplexer select signal is coupled to the select input of the first multiplexer stage for controlling the first multiplexer stage to select the oscillator feedback signal or the static differential signal for stopping the bipolar ring oscillator.
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